A 70-mW 300-MHz CMOS continuous-time ΣΔ ADC with 15-MHz bandwidth and 11 bits of resolution S Paton, A Di Giandomenico, L Hernández, A Wiesbauer, T Potscher, ...
Solid-State Circuits, IEEE Journal of 39 (7), 1056-1063, 2004
249 2004 Modelling and optimization of low pass continuous-time sigma delta modulators for clock jitter noise reduction L Hernández, A Wiesbauer, S Paton, A Di Giandomencio
Circuits and Systems, 2004. ISCAS'04. Proceedings of the 2004 International …, 2004
86 2004 A 0.1 mm E Prefasi, L Hernandez, S Paton, A Wiesbauer, R Gaggl, E Pun
IEEE journal of solid-state circuits 44 (10), 2745-2754, 2009
61 2009 VCO-based sigma delta modulator with PWM precoding L Hernández, S Patón, E Prefasi
Electronics letters 47 (10), 588-589, 2011
52 2011 A 15 MHz Bandwidth Sigma-Delta ADC with 11 Bits of Resolution in 0.13 μm CMOS A Giandomenico, S Paton, A Wiesbauer, L Hernandez, T Potscher
European Solid-State Circuits Conference, 233-236, 2003
46 * 2003 A 15 MHz bandwidth sigma-delta ADC with 11 bits of resolution in 0.13/spl mu/m CMOS A Di Giandomenico, S Paton, A Wiesbauer, L Hernández, T Potscher, ...
Solid-State Circuits Conference, 2003. ESSCIRC'03. Proceedings of the 29th …, 2003
38 2003 A 1.2-MHz 10-bit continuous-time sigma–delta ADC using a time encoding quantizer LH Corporales, E Prefasi, E Pun, S Paton
IEEE Transactions on Circuits and Systems II: Express Briefs 56 (1), 16-20, 2009
36 2009 A superregenerative receiver for phase and frequency modulated carriers L Hernández, S Patón
Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on 3 …, 2002
33 2002 A 7 mW 20 MHz BW Time-Encoding Oversampling Converter Implemented in a 0.08 mm E Prefasi, S Paton, L Hernandez
IEEE Journal of Solid-State Circuits 46 (7), 1562-1574, 2011
31 2011 Sigma-delta modulators A Di Giandomenico, L Hernandez, S Paton, DSS Bello, ...
US Patent 7,460,046, 2008
29 2008 Loop filter for a continuous time sigma delta analog to digital converter M Clara, A Di Giandomenico, L Hernandez, S Paton, A Wiesbauer
US Patent 6,967,606, 2005
20 2005 A 2-2 Discrete Time Cascaded ΣΔ Modulator With NTF Zero Using Interstage Feedback M Sanchez-Renedo, S Paton, L Hernández
Electronics, Circuits and Systems, 2006. ICECS'06. 13th IEEE International …, 2006
19 2006 Second-order multi-bit ΣΔ ADC using a pulse-width modulated DAC and an integrating quantizer E Prefasi, E Pun, L Hernández, S Paton
Electronics, Circuits, and Systems, 2009. ICECS 2009. 16th IEEE …, 2009
17 2009 Analysis of VCO based noise shaping ADCs linearized by PWM modulation L Hernandez, E Prefasi, S Paton, P Rombouts
Electronics, Circuits and Systems (ICECS), 2012 19th IEEE International …, 2012
16 2012 A 0.08 mm 2, 7mW Time-Encoding Oversampling Converter with 10 bits and 20MHz BW in 65nm CMOS E Prefasi, S Paton, L Hernandez, R Gaggl, A Wiesbauer, J Hauptmann
ESSCIRC, 2010 Proceedings of the, 430-433, 2010
15 2010 A jitter insensitive continuous-time ΣΔ modulator using transmission lines L Hernández, P Rombouts, E Prefasi, S Paton, M Garcia, C Lopez
Electronics, Circuits and Systems, 2004. ICECS 2004. Proceedings of the 2004 …, 2004
14 2004 Clock Jitter Analysis of Continuous-Time Σ Δ Modulators Based on a Relative Time-Base Projection F Cardes, V Medina, S Paton, L Hernandez
IEEE Transactions on Circuits and Systems I: Regular Papers, 2018
13 2018 Continuous time sigma-delta modulators with transmission line resonators and improved jitter and excess loop delay performance L Hernández, S Patón
Circuits and Systems, 2003. ISCAS'03. Proceedings of the 2003 International …, 2003
11 2003 Linearity enhancement techniques in low OSR, high clock rate multi-bit continuous-time sigma-delta modulators S Paton, T Poscher, A Di Giandomenico, K Kolhaupt, L Hernandez, ...
Custom Integrated Circuits Conference, 2004. Proceedings of the IEEE 2004 …, 2004
10 2004 Self-Adjustable Galvanic Skin Response Sensor for Physiological Monitoring JAM Calero, A Páez-Montoro, C López-Ongil, S Paton
IEEE Sensors Journal 23 (3), 3005-3019, 2023
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