Kevin Brownell
Kevin Brownell
Verified email at eecs.harvard.edu
Title
Cited by
Cited by
Year
HELIX-RC: An Architecture-Compiler Co-Design for Automatic Parallelization of Irregular Programs
S Campanoni, K Brownell, S Kanev, TM Jones, GY Wei, D Brooks
502014
Evaluation of voltage interpolation to address process variations
K Brownell, GY Wei, D Brooks
2008 IEEE/ACM International Conference on Computer-Aided Design, 529-536, 2008
142008
Methods and apparatus for parallel processing
GY Wei, DM Brooks, S Campanoni, KM Brownell, S Kanev
US Patent App. 14/898,894, 2016
72016
Automating design of voltage interpolation to address process variations
KM Brownell, AD Khan, GY Wei, D Brooks
IEEE transactions on very large scale integration (VLSI) systems 19 (3), 383-396, 2009
32009
Automatically accelerating non-numerical programs by architecture-compiler co-design
S Campanoni, K Brownell, S Kanev, TM Jones, GY Wei, D Brooks
Communications of the ACM 60 (12), 88-97, 2017
12017
Architectural Implications of Automatic Parallelization With HELIX-RC
KM Brownell
12015
Breaking Cyclic-Multithreading Parallelization with XML Parsing
S Campanoni, S Kanev, K Brownell, D Brooks, GY Wei
PRISM, 2014
12014
Place and route considerations for voltage interpolated designs
K Brownell, AD Khan, D Brooks, GY Wei
2009 10th International Symposium on Quality Electronic Design, 594-600, 2009
12009
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