Bo Zhao
Bo Zhao
Verified email at pitt.edu
Title
Cited by
Cited by
Year
A durable and energy efficient main memory using phase change memory technology
P Zhou, B Zhao, J Yang, Y Zhang
ACM SIGARCH computer architecture news 37 (3), 14-23, 2009
9822009
Phase-change technology and the future of main memory
BC Lee, P Zhou, J Yang, Y Zhang, B Zhao, E Ipek, O Mutlu, D Burger
IEEE micro 30 (1), 2010
4002010
Energy reduction for STT-RAM using early write termination
P Zhou, B Zhao, J Yang, Y Zhang
Computer-Aided Design-Digest of Technical Papers, 2009. ICCAD 2009. IEEE/ACM …, 2009
3582009
Improving write operations in MLC phase change memory
L Jiang, B Zhao, Y Zhang, J Yang, BR Childers
High Performance Computer Architecture (HPCA), 2012 IEEE 18th International …, 2012
1792012
A low-radix and low-diameter 3D interconnection network design
Y Xu, Y Du, B Zhao, X Zhou, Y Zhang, J Yang
High Performance Computer Architecture, 2009. HPCA 2009. IEEE 15th …, 2009
1012009
Constructing large and fast multi-level cell STT-MRAM based cache for embedded processors
L Jiang, B Zhao, Y Zhang, J Yang
Proceedings of the 49th Annual Design Automation Conference, 907-912, 2012
762012
Simple virtual channel allocation for high throughput and high frequency on-chip routers
Y Xu, B Zhao, Y Zhang, J Yang
High Performance Computer Architecture (HPCA), 2010 IEEE 16th International …, 2010
562010
Frequent value compression in packet-based NoC architectures
P Zhou, B Zhao, Y Du, Y Xu, Y Zhang, J Yang, L Zhao
Proceedings of the 2009 Asia and South Pacific Design Automation Conference …, 2009
322009
Variation-tolerant non-uniform 3D cache management in die stacked multicore processor
B Zhao, Y Du, Y Zhang, J Yang
Microarchitecture, 2009. MICRO-42. 42nd Annual IEEE/ACM International …, 2009
292009
Throughput enhancement for phase change memories
P Zhou, B Zhao, J Yang, Y Zhang
IEEE Transactions on Computers 63 (8), 2080-2093, 2014
242014
A low power and reliable charge pump design for phase change memories
L Jiang, B Zhao, J Yang, Y Zhang
Computer Architecture (ISCA), 2014 ACM/IEEE 41st International Symposium on …, 2014
242014
Architecting a common-source-line array for bipolar non-volatile memory devices
B Zhao, J Yang, Y Zhang, Y Chen, H Li
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2012 …, 2012
182012
Process Variation-Aware Nonuniform Cache Management in a 3D Die-Stacked Multicore Processor
B Zhao, Y Du, J Yang, Y Zhang
IEEE Transactions on Computers 62 (11), 2252-2265, 2013
162013
A speculative arbiter design to enable high-frequency many-VC router in NoCs
B Zhao, Y Zhang, J Yang
Networks on Chip (NoCS), 2013 Seventh IEEE/ACM International Symposium on, 1-8, 2013
152013
Hardware-assisted cooperative integration of wear-leveling and salvaging for phase change memory
L Jiang, Y Du, B Zhao, Y Zhang, BR Childers, J Yang
ACM Transactions on Architecture and Code Optimization (TACO) 10 (2), 7, 2013
82013
Common-source-line array: An area efficient memory architecture for bipolar nonvolatile devices
B Zhao, J Yang, Y Zhang, Y Chen, H Li
ACM Transactions on Design Automation of Electronic Systems (TODAES) 18 (4), 57, 2013
72013
Improving phase change memory (PCM) and spin-torque-transfer magnetic-RAM (STT-MRAM) as next-generation memories: a circuit perspective
B Zhao
University of Pittsburgh, 2013
42013
MRAC: A Memristor-based Reconfigurable Framework for Adaptive Cache Replacement
P Zhou, B Zhao, Y Zhang, J Yang, Y Chen
Parallel Architectures and Compilation Techniques (PACT), 2011 International …, 2011
22011
Constructing Large and Fast On-Chip Cache for Mobile Processors with Multilevel Cell STT-MRAM Technology
L Jiang, B Zhao, J Yang, Y Zhang
ACM Transactions on Design Automation of Electronic Systems (TODAES) 20 (4), 54, 2015
12015
Simple Virtual Channel Allocation for High-Throughput and High-Frequency On-Chip Routers
Y Xu, B Zhao, Y Zhang, J Yang
ACM Transactions on Parallel Computing 2 (1), 6, 2015
12015
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Articles 1–20