Paul N Whatmough
Paul N Whatmough
Arm ML Research Lab, Harvard University
Verified email at arm.com - Homepage
Title
Cited by
Cited by
Year
Minerva: Enabling Low-Power, Highly-Accurate Deep Neural Network Accelerators
B Reagen, PN Whatmough, R Adolf, S Rama, H Lee, SK Lee, ...
International Symposium on Computer Architecture (ISCA), Proceedings of the …, 2016
4552016
A 28nm SoC with a 1.2 GHz 568nJ/prediction Sparse Deep-Neural-Network Engine with >0.1 Timing Error Rate Tolerance for IoT Applications
PN Whatmough, SK Lee, H Lee, S Rama, D Brooks, GY Wei
Solid-State Circuits Conference (ISSCC), 2017 IEEE International, 242-243, 2017
1502017
Ares: A framework for quantifying the resilience of deep neural networks
B Reagen, U Gupta, L Pentecost, P Whatmough, SK Lee, N Mulholland, ...
2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC), 1-6, 2018
1202018
Scale-Sim: Systolic CNN Accelerator Simulator
A Samajdar, Y Zhu, P Whatmough, M Mattina, T Krishna
arXiv preprint arXiv:1811.02883, 2018
1082018
VLSI Architecture for a Reconfigurable Spectrally Efficient FDM Baseband Transmitter
PN Whatmough, MR Perrett, S Isam, I Darwazeh
IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I) 59 (5 …, 2012
962012
VLSI Architecture for a Reconfigurable Spectrally Efficient FDM Baseband Transmitter
PN Whatmough, MR Perrett, S Isam, I Darwazeh
Circuits and Systems (ISCAS), 2011 IEEE International Symposium on, 1688-1691, 2011
962011
Circuit-Level Timing Error Tolerance for Low-Power DSP Filters and Transforms
PN Whatmough, S Das, DM Bull, I Darwazeh
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 21 (6), 989-999, 2013
652013
Euphrates: Algorithm-SoC Co-Design for Low-Power Mobile Continuous Vision
Y Zhu, A Samajdar, M Mattina, P Whatmough
45th Annual International Symposium on Computer Architecture (ISCA), 547-560, 2018
532018
A Low-Power 1GHz Razor FIR Accelerator with Time-Borrow Tracking Pipeline and Approximate Error Correction in 65nm CMOS
PN Whatmough, S Das, DM Bull
IEEE Journal of Solid-State Circuits (JSSC) 49 (1), 84-94, 2014
482014
A Low-Power 1GHz Razor FIR Accelerator with Time-Borrow Tracking Pipeline and Approximate Error Correction in 65nm CMOS
PN Whatmough, S Das, DM Bull
International Solid-State Circuits Conference (ISSCC), Digest of Technical …, 2013
482013
DNN ENGINE: A 28-nm Timing-Error Tolerant Sparse Deep Neural Network Processor for IoT Applications
PN Whatmough, SK Lee, D Brooks, GY Wei
IEEE Journal of Solid-State Circuits (JSSC) 53 (9), 2722-2731, 2018
462018
A case for efficient accelerator design space exploration via bayesian optimization
B Reagen, JM Hernández-Lobato, R Adolf, M Gelbart, P Whatmough, ...
2017 IEEE/ACM International Symposium on Low Power Electronics and Design …, 2017
392017
SpArSe: Sparse Architecture Search for CNNs on Resource-Constrained Microcontrollers
I Fedorov, RP Adams, M Mattina, P Whatmough
Advances in Neural Information Processing Systems (NeurIPS), 4978-4990, 2019
382019
System-Efficiency Analysis of Power Amplifier Supply-Tracking Regimes in Mobile Transmitters
BJ Minnis, PA Moore, PN Whatmough, PG Blanken, MP Van Der Heijden
Circuits and Systems I: Regular Papers (TCAS-I), IEEE Transactions on 56 (1 …, 2009
382009
FixyNN: Efficient Hardware for Mobile Computer Vision via Transfer Learning
PN Whatmough, C Zhou, P Hansen, SK Venkataramanaiah, J Seo, ...
The 2nd Conference on Systems and Machine Learning (SysML) 2019, Palo Alto …, 2019
352019
Modeling and Characterization of the System-Level Power Delivery Network for a Dual-Core ARM Cortex-A57 Cluster in 28nm CMOS
S Das, PN Whatmough, D Bull
2015 IEEE/ACM International Symposium on Low Power Electronics and Design …, 2015
352015
Deep learning for computer architects
B Reagen, R Adolf, PN Whatmough, GY Wei, D Brooks
Synthesis Lectures on Computer Architecture 12 (4), 1-123, 2017
322017
Mobile machine learning hardware at Arm: A systems-on-chip (SoC) perspective
Y Zhu, M Mattina, P Whatmough
1st Conference on Systems and Machine Learning (SysML) 2019, 2018
242018
Power Integrity Analysis of a 28 nm Dual-Core Arm Cortex-A57 Cluster using an All-Digital Power Delivery Monitor
PN Whatmough, S Das, Z Hadjilambrou, DM Bull
IEEE Journal of Solid-State Circuits (JSSC) 52 (6), 1643-1654, 2017
232017
An All-Digital Power-Delivery Monitor for Analysis of a 28nm Dual-Core ARM Cortex-A57 Cluster
PN Whatmough, S Das, Z Hadjilambrou, DM Bull
International Solid-State Circuits Conference (ISSCC), 2015 IEEE, 1-3, 2015
232015
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