Juan Luis Aragón
Juan Luis Aragón
Associate Professor, University of Murcia (Spain)
Verified email at um.es - Homepage
TitleCited byYear
Dynamics of the eye’s wave aberration
H Hofer, P Artal, B Singer, JL Aragón, DR Williams
JOSA A 18 (3), 497-506, 2001
Rapid, automatic measurement of the eye's wave aberration
DR Williams, WJ Vaughn, BD Singer, H Hofer, GY Yoon, P Artal, JL Arag, ...
US Patent 6,199,986, 2001
Rapid, automatic measurement of the eye's wave aberration
DR Williams, WJ Vaughn, BD Singer, H Hofer, GY Yoon, P Artal, JL Arag, ...
US Patent 6,827,444, 2004
Power-aware control speculation through selective throttling
JL Aragón, J González, A González
The Ninth International Symposium on High-Performance Computer Architecture …, 2003
Heterogeneous interconnects for energy-efficient message management in cmps
A Flores, JL Aragon, ME Acacio
IEEE Transactions on Computers 59 (1), 16-28, 2009
Dual path instruction processing
JL Aragón, J González, A González, JE Smith
Proceedings of the 16th international conference on Supercomputing, 220-229, 2002
Control speculation for energy-efficient next-generation superscalar processors
JL Aragon, J Gonzalez, A Gonzalez
IEEE Transactions on Computers 55 (3), 281-291, 2006
Confidence estimation for branch prediction reversal
JL Aragón, J González, JM Garcia, A González
International Conference on High-Performance Computing, 214-223, 2001
DeSC: Decoupled supply-compute communication management for heterogeneous architectures
TJ Ham, JL Aragón, M Martonosi
Proceedings of the 48th International Symposium on Microarchitecture, 191-203, 2015
Power token balancing: Adapting cmps to power constraints for parallel multithreaded workloads
JM Cebri, JL Aragon, S Kaxiras
2011 IEEE International Parallel & Distributed Processing Symposium, 431-442, 2011
An energy consumption characterization of on-chip interconnection networks for tiled CMP architectures
A Flores, JL Aragón, ME Acacio
The Journal of Supercomputing 45 (3), 341-364, 2008
Sim-PowerCMP: a detailed simulator for energy consumption analysis in future embedded CMP architectures
A Flores, JL Aragon, ME Acacio
21st International Conference on Advanced Information Networking and …, 2007
MLP-Aware instruction queue resizing: the key to power-efficient performance
P Petoumenos, G Psychou, S Kaxiras, JMC Gonzalez, JL Aragon
International Conference on Architecture of Computing systems, 113-125, 2010
Efficient microarchitecture policies for accurately adapting to power constraints
JM Cebrian, JL Aragon, JM Garcia, P Petoumenos, S Kaxiras
IPDPS '09 Proceedings of the 2009 IEEE International Symposium on Parallel …, 2009
Temporal characteristics of the eye's aberrations
HJ Hofer, P Artal, JL Aragon, DR Williams
An analytical model for the calculation of the expected miss ratio in faulty caches
D Sánchez, Y Sazeides, JL Aragón, JM García
2011 IEEE 17th International On-Line Testing Symposium, 252-257, 2011
Evaluating dynamic core coupling in a scalable tiled-cmp architecture
D Sánchez, JL Aragón, JM García
International Workshop on Duplicating, Deconstructing, and Debunking (WDDD), 2008
Modeling the impact of permanent faults in caches
D Sánchez, Y Sazeides, JM Cebrián, JM García, JL Aragón
ACM Transactions on Architecture and Code Optimization (TACO) 10 (4), 29, 2013
A log-based redundant architecture for reliable parallel computation
D Sánchez, JL Aragón, JM Garcia
2010 International Conference on High Performance Computing, 1-10, 2010
Energy-efficient hardware prefetching for CMPs using heterogeneous interconnects
A Flores, JL Aragón, ME Acacio
2010 18th Euromicro Conference on Parallel, Distributed and Network-based …, 2010
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