Bruce Jacob
Bruce Jacob
Professor of Electrical & Computer Engineering, University of Maryland
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Cited by
Cited by
Memory systems: Cache, DRAM, disk
DT Wang, SW Ng, B Jacob
Morgan Kaufmann Publishers, 2008
DRAMSim2: A cycle accurate memory system simulator
P Rosenfeld, E Cooper-Balis, B Jacob
IEEE computer architecture letters 10 (1), 16-19, 2011
DRAMsim: a memory system simulator
D Wang, B Ganesh, N Tuaycharoen, K Baynes, A Jaleel, B Jacob
ACM SIGARCH Computer Architecture News 33 (4), 100-107, 2005
A performance comparison of contemporary DRAM architectures
V Cuppu, B Jacob, B Davis, T Mudge
Proceedings of the 26th annual international symposium on Computer …, 1999
The structural simulation toolkit
AF Rodrigues, KS Hemmert, BW Barrett, C Kersey, R Oldfield, M Weston, ...
ACM SIGMETRICS Performance Evaluation Review 38 (4), 37-42, 2011
The performance of PC solid-state disks (SSDs) as a function of bandwidth, concurrency, device architecture, and system organization
C Dirik, B Jacob
ACM SIGARCH Computer Architecture News 37 (3), 279-289, 2009
Technology comparison for large last-level caches (L3Cs): Low-leakage SRAM, low write-energy STT-RAM, and refresh-optimized eDRAM
MT Chang, P Rosenfeld, SL Lu, B Jacob
2013 IEEE 19th International Symposium on High Performance Computer …, 2013
CMP $ im: A Pin-based on-the-fly multi-core cache simulator
A Jaleel, RS Cohn, CK Luk, B Jacob
Proceedings of the Fourth Annual Workshop on Modeling, Benchmarking and …, 2008
Composing with genetic algorithms
B Jacob
International Computer Music Association, 1995
Biobench: A benchmark suite of bioinformatics applications
K Albayraktaroglu, A Jaleel, X Wu, M Franklin, B Jacob, CW Tseng, ...
IEEE International Symposium on Performance Analysis of Systems and Software …, 2005
Last level cache (llc) performance of data mining workloads on a cmp-a case study of parallel bioinformatics workloads
A Jaleel, M Mattina, B Jacob
The Twelfth International Symposium on High-Performance Computer …, 2006
Hardware support for real-time operating systems
P Kohout, B Ganesh, B Jacob
Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware …, 2003
A look at several memory management units, TLB-refill mechanisms, and page table organizations
BL Jacob, TN Mudge
ACM SIGPLAN Notices 33 (11), 295-306, 1998
Virtual memory in contemporary microprocessors
B Jacob, T Mudge
IEEE Micro 18 (4), 60-75, 1998
A control-theoretic approach to dynamic voltage scheduling
A Varma, B Ganesh, M Sen, SR Choudhury, L Srinivasan, B Jacob
Proceedings of the 2003 international conference on Compilers, architecture …, 2003
Algorithmic composition as a model of creativity
B Jacob
Concurrency, latency, or system overhead: Which has the largest impact on uniprocessor DRAM-system performance?
V Cuppu, B Jacob
Proceedings 28th Annual international symposium on computer architecture, 62-71, 2001
Virtual memory: Issues of implementation
B Jacob, T Mudge
Computer 31 (6), 33-43, 1998
An analytical model for designing memory hierarchies
BL Jacob, PM Chen, SR Silverman, TN Mudge
IEEE Transactions on Computers 45 (10), 1180-1194, 1996
Fully-buffered DIMM memory architectures: Understanding mechanisms, overheads and scaling
B Ganesh, A Jaleel, D Wang, B Jacob
2007 IEEE 13th International Symposium on High Performance Computer …, 2007
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