Yuho Jin
Yuho Jin
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Recursive partitioning multicast: A bandwidth-efficient routing for networks-on-chip
L Wang, Y Jin, H Kim, EJ Kim
2009 3rd ACM/IEEE International Symposium on Networks-on-Chip, 64-73, 2009
A framework for end-to-end simulation of high-performance computing systems
WE Denzel, J Li, P Walker, Y Jin
Simulation 86 (5-6), 331-350, 2010
Adaptive data compression for high-performance low-power on-chip networks
Y Jin, KH Yum, EJ Kim
2008 41st IEEE/ACM International Symposium on Microarchitecture, 354-363, 2008
A domain-specific on-chip network design for large scale cache systems
Y Jin, EJ Kim, KH Yum
2007 IEEE 13th International Symposium on High Performance Computer …, 2007
Communication-aware globally-coordinated on-chip networks
Y Jin, EJ Kim, TM Pinkston
IEEE Transactions on Parallel and Distributed Systems 23 (2), 242-254, 2011
Peak power control for a QoS capable on-chip network
Y Jin, EJ Kim, KH Yum
2005 International Conference on Parallel Processing (ICPP'05), 585-592, 2005
Packet coalescing exploiting data redundancy in GPGPU architectures
KH Kim, R Boyapati, J Huang, Y Jin, KH Yum, EJ Kim
Proceedings of the International Conference on Supercomputing, 1-10, 2017
Thread criticality support in on-chip networks
Y Jin, R Wang, W Choi, TM Pinkston
Proceedings of the Third International Workshop on Network on Chip …, 2010
Design and analysis of on-chip networks for large-scale cache systems
Y Jin, EJ Kim, KH Yum
IEEE Transactions on Computers 59 (3), 332-344, 2009
Pais: Parallelism-aware interconnect scheduling in multicores
Y Jin, TM Pinkston
ACM Transactions on Embedded Computing Systems (TECS) 13 (3s), 1-21, 2014
Integration of admission, congestion, and peak power control in QoS-aware clusters
KH Yum, Y Jin, EJ Kim, CR Das
Journal of Parallel and Distributed Computing 70 (11), 1087-1099, 2010
I/O node placement for performance and reliability in torus networks
B Azeez, H Kim, Y Jin, EJ Kim
International Conference on Parallel and Distributed Computing and Systems …, 2006
Intra-clustering: Accelerating on-chip communication for data parallel architectures
W Yuan, R Boyapati, L Wang, H Jang, Y Jin, KH Yum, EJ Kim
2015 International Symposium on Computer Architecture and High Performance …, 2015
Performance evaluation of mesh-based 3d nocs
J Gardea, Y Jin, AH Badawy, J Cook
Proceedings of the 10th International Workshop on Network on Chip …, 2017
Unifying Router Power Gating with Data Placement for Energy-Efficient NoC
Y Jin
2015 27th International Symposium on Computer Architecture and High …, 2015
Architectural support for efficient communication in future microprocessors
YH Jin
Texas A&M University, 2009
3D-PIM NoCs with Multiple Subnetworks: A Performance and Power Evaluation
AHA Badawy, J Gardea, Y Jin, J Cook
2018 IEEE 37th International Performance Computing and Communications …, 2018
Adaptive Packet Resizing by Spatial Locality and Data Sharing for Energy-Efficient NOC
B Gao, Y Jin
2013 International Conference on Parallel and Distributed Systems, 26-33, 2013
Adaptive Data Compression for Low-Power On-Chip Networks
Y Jin, KH Yum, EJ Kim
Low Power Networks-on-Chip, 151-174, 2010
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