Jesus Urresti Ibáñez
Jesus Urresti Ibáñez
Research Associate, Newcastle University
Dirección de correo verificada de ncl.ac.uk
TítuloCitado porAño
Analysis of clamped inductive turnoff failure in railway traction IGBT power modules under overload conditions
X Perpina, JF Serviere, J Urresti-Ibañez, I Cortes, X Jorda, S Hidalgo, ...
IEEE Transactions on Industrial Electronics 58 (7), 2706-2714, 2010
402010
A numerical study of field plate configurations in RF SOI LDMOS transistors
I Cortés, J Roig, D Flores, J Urresti, S Hidalgo, J Rebollo
Solid-State Electronics 50 (2), 155-163, 2006
342006
IGBT module failure analysis in railway applications
X Perpina, JF Serviere, X Jordà, A Fauquet, S Hidalgo, J Urresti-Ibañez, ...
Microelectronics Reliability 48 (8-9), 1427-1431, 2008
332008
Analysis of hot-carrier degradation in a SOI LDMOS transistor with a steep retrograde drift doping profile
I Cortés, J Roig, D Flores, J Urresti, S Hidalgo, J Rebollo
Microelectronics Reliability 45 (3-4), 493-498, 2005
322005
UIS failure mechanism of SiC power MOSFETs
A Fayyaz, A Castellazzi, G Romano, M Riccio, A Irace, J Urresti, N Wright
2016 IEEE 4th Workshop on Wide Bandgap Power Devices and Applications (WiPDA …, 2016
162016
Layout role in failure physics of IGBTs under overloading clamped inductive turnoff
X Perpina, I Cortes, J Urresti-Ibañez, X Jorda, J Rebollo
IEEE Transactions on Electron Devices 60 (2), 598-605, 2012
152012
Modeling of non-uniform heat generation in LDMOS transistors
J Roig, D Flores, J Urresti, S Hidalgo, J Rebollo
Solid-state electronics 49 (1), 77-84, 2005
152005
A comprehensive study on the avalanche breakdown robustness of silicon carbide power MOSFETs
A Fayyaz, G Romano, J Urresti, M Riccio, A Castellazzi, A Irace, N Wright
Energies 10 (4), 452, 2017
142017
Lateral punch-through TVS devices for on-chip protection in low-voltage applications
J Urresti, S Hidalgo, D Flores, J Roig, I Cortés, J Rebollo
Microelectronics Reliability 45 (7-8), 1181-1186, 2005
142005
Robustness test and failure analysis of IGBT modules during turn-off
J Urresti-Ibañez, A Castellazzi, M Piton, J Rebollo, M Mermet-Guyennet, ...
Microelectronics reliability 47 (9-11), 1725-1729, 2007
132007
Integrated compact modelling of a planar-gate non-punch-through 3.3 kV-1200A IGBT module for insightful analysis and realistic interpretation of the failure mechanisms
A Castellazzi, M Ciappa, W Fichtner, J Urresti-Ibañez, ...
Proceedings of the 19th International Symposium on Power Semiconductor …, 2007
112007
Edge termination impact on clamped inductive turn-off failure in high-voltage IGBTs under overcurrent conditions
X Perpiñà, I Cortés, J Urresti-Ibañez, X Jordà, J Rebollo, J Millán
2011 IEEE 23rd International Symposium on Power Semiconductor Devices and …, 2011
92011
Optimisation of very low voltage TVS protection devices
J Urresti, S Hidalgo, D Flores, J Roig, J Rebollo, I Mazarredo
Microelectronics journal 34 (9), 809-813, 2003
92003
Increased Mobility in Enhancement Mode 4H-SiC MOSFET Using a Thin SiO2/ Al2O3Gate Stack
F Arith, J Urresti, K Vasilevskiy, S Olsen, N Wright, A O’Neill
IEEE Electron Device Letters 39 (4), 564-567, 2018
82018
Transient out-of-SOA robustness of SiC power MOSFETs
A Castellazzi, A Fayyaz, G Romano, M Riccio, A Irace, J Urresti-Ibanez, ...
2017 IEEE International Reliability Physics Symposium (IRPS), 2A-3.1-2A-3.8, 2017
82017
Efficiency of SOI-like structures for reducing the thermal resistance in thin-film SOI power LDMOSFETs
J Roig, J Urresti, I Cortes, D Flores, S Hidalgo, J Millan
IEEE electron device letters 25 (11), 743-745, 2004
82004
Low voltage TVS devices: design and fabrication
J Urresti, S Hidalgo, D Flores, J Roig, J Rebollo, J Millan
Proceedings. International Semiconductor Conference 2, 257-260, 2002
72002
Analysis and optimization of safe-operating-area of LUDMOS transistors based on 0.18 µm SOI CMOS technology
I Cortés, G Toulon, F Morancho, J Urresti, X Perpiñà, B Villard
Semiconductor Science Technology 25 (4), 2010
62010
Over-current turn-off failure in high voltage IGBT modules under clamped inductive load
X Perpiñà, JF Serviere, X Jorda, S Hidalgo, J Urresti-Ibanez, J Rebollo, ...
2009 13th European Conference on Power Electronics and Applications, 1-10, 2009
62009
Lateral punch-through TVS devices: design and fabrication
J Urresti, S Hidalgo, D Flores, J Rebollo
2009 Spanish Conference on Electron Devices, 148-151, 2009
62009
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Artículos 1–20