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Vatistas Kostalabros
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An academic risc-v silicon implementation based on open-source components
J Abella, C Bulla, G Cabo, FJ Cazorla, A Cristal, M Doblas, R Figueras, ...
2020 XXXV Conference on Design of Circuits and Integrated Systems (DCIS), 1-6, 2020
212020
HLS-Based HW/SW Co-Design of the Post-Quantum Classic McEliece Cryptosystem
V Kostalabros, J Ribes-González, O Farrŕs, M Moretó, C Hernandez
2021 31st International Conference on Field-Programmable Logic and …, 2021
172021
Enabling hardware randomization across the cache hierarchy in Linux-Class processors
M Doblas, IV Kostalabros, M Moreto Planas, C Hernández Luz
Fourth Workshop on Computer Architecture Research with RISC-V (CARRV 2020 …, 2020
62020
A Security Model for Randomization-based Protected Caches
J Ribes-González, O Farrŕs, C Hernández, V Kostalabros, M Moretó
Cryptology ePrint Archive, 2022
22022
Carrier Phase Recovery of 64 GBd Optical 16-QAM Using Extensive Parallelization on an FPGA
V Kostalampros, KMG Lentaris, D Soudris, C Spatharakis, N Argyris, ...
2018 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2018
22018
A Safety-Critical, RISC-V SoC Integrated and ASIC-Ready Classic McEliece Accelerator
V Kostalabros, J Ribes-González, O Farrŕs, M Moretó, C Hernandez
International Symposium on Applied Reconfigurable Computing, 282-295, 2024
2024
Real-Time Carrier Phase Recovery for 16-QAM Utilizing the Nonlinear Least Squares Algorithm
V Kostalampros, C Spatharakis, K Maragos, G Lentaris, N Argyris, S Dris, ...
2018 Optical Fiber Communications Conference and Exposition (OFC), 1-3, 2018
2018
Lagarto: First Silicon RISC-V Academic Processor Developed in Spain
J Abella, G Cabo, FJ Cazorla, A Cristal, R Figueras, A González, ...
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