| SEU simulation framework for Xilinx FPGA: First step towards testing fault tolerant systems M Straka, J Kastil, Z Kotasek 2011 14th Euromicro Conference on Digital System Design, 223-230, 2011 | 63 | 2011 |
| Fault tolerant system design and SEU injection based testing M Straka, J Kastil, Z Kotasek, L Miculka Microprocessors and Microsystems 37 (2), 155-173, 2013 | 49 | 2013 |
| Fault tolerant structure for sram-based fpga via partial dynamic reconfiguration M Straka, J Kastil, Z Kotasek 2010 13th Euromicro Conference on Digital System Design: Architectures …, 2010 | 31 | 2010 |
| Generic partial dynamic reconfiguration controller for fault tolerant designs based on FPGA M Straka, J Kastil, Z Kotasek NORCHIP 2010, 1-4, 2010 | 30 | 2010 |
| Netbench: Framework for evaluation of packet processing algorithms V Pus, J Tobola, V Kosar, J Kastil, J Korenek 2011 ACM/IEEE Seventh Symposium on Architectures for Networking and …, 2011 | 28 | 2011 |
| Modern fault tolerant architectures based on partial dynamic reconfiguration in fpgas M Straka, J Kastil, Z Kotasek 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and …, 2010 | 26 | 2010 |
| Dependability analysis of fault tolerant systems based on partial dynamic reconfiguration implemented into FPGA J Kastil, M Straka, L Miculka, Z Kotasek 2012 15th Euromicro Conference on Digital System Design, 250-257, 2012 | 15 | 2012 |
| Hardware accelerated pattern matching based on deterministic finite automata with perfect hashing J Kastil, J Korenek 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and …, 2010 | 15 | 2010 |
| Methodology for fast pattern matching by deterministic finite automaton with perfect hashing J Kastil, J Korenek, O Lengal 2009 12th Euromicro Conference on Digital System Design, Architectures …, 2009 | 15 | 2009 |
| Fault tolerant field programmable neural networks M Krcma, Z Kotasek, J Kastil 2015 Nordic Circuits and Systems Conference (NORCAS): NORCHIP …, 2015 | 11 | 2015 |
| Mapping trained neural networks to FPNNs M Krcma, J Kastil, Z Kotásek 2015 IEEE 18th International Symposium on Design and Diagnostics of …, 2015 | 10 | 2015 |
| Test platform for fault tolerant systems design properties verification M Straka, L Miculka, J Kastil, Z Kotasek 2012 IEEE 15th International Symposium on Design and Diagnostics of …, 2012 | 9 | 2012 |
| Fault tolerant can bus control system implemented into fpga K Szurman, J Kastil, M Straka, Z Kotasek 2013 IEEE 16th International Symposium on Design and Diagnostics of …, 2013 | 7 | 2013 |
| Methodology for increasing reliability of FPGA design via partial reconfiguration J Kastil, M Straka, Z Kotasek The First Workshop on Manufacturable and Dependable Multicore Architectures …, 2012 | 6 | 2012 |
| High speed pattern matching algorithm based on deterministic finite automata with faulty transition table J Kastil, J Korenek Proceedings of the 6th ACM/IEEE Symposium on Architectures for Networking …, 2010 | 6 | 2010 |
| Advanced fault tolerant bus for multicore system implemented in FPGA M Straka, J Kastil, J Novotny, Z Kotasek 14th IEEE International Symposium on Design and Diagnostics of Electronic …, 2011 | 4 | 2011 |
| Hardware architecture for the fast pattern matching J Kastil, V Kosar, J Korenek 2013 IEEE 16th International Symposium on Design and Diagnostics of …, 2013 | 2 | 2013 |
| Vyhledávání regulárních výrazů ve vysokorychlostním síťovém provozu J Kaštil Počítačové architektury a diagnostika, 89-94, 2009 | 1 | 2009 |
| Optimalizace algoritmů a DatovýCH Struktur Pro VyhledáVání ReguláRníCH VýRazů S VyužITíM Technologie FPGA; Optimization of Algorithms and Data Structures for Regular expression … J Kastil Brno University of Technology, Czech Republic, 2016 | | 2016 |
| Redundancy free fault tolerant FPNNs M Krcma, Z Kotasek, J Kastil | | |
