Eduardo Quiñones
Eduardo Quiñones
Senior Researcher, Barcelona Supercomputing Center
Dirección de correo verificada de bsc.es - Página principal
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Hardware support for WCET analysis of hard real-time multicore systems
M Paolieri, E Quiñones, FJ Cazorla, G Bernat, M Valero
ACM SIGARCH Computer Architecture News 37 (3), 57-68, 2009
3002009
Measurement-based probabilistic timing analysis for multi-path programs
L Cucu-Grosjean, L Santinelli, M Houston, C Lo, T Vardanega, L Kosmidis, ...
2012 24th euromicro conference on real-time systems, 91-101, 2012
2402012
Merasa: Multicore execution of hard real-time applications supporting analyzability
T Ungerer, F Cazorla, P Sainrat, G Bernat, Z Petrov, C Rochange, ...
IEEE Micro 30 (5), 66-75, 2010
1852010
Proartis: Probabilistically analyzable real-time systems
FJ Cazorla, E Quiñones, T Vardanega, L Cucu, B Triquet, G Bernat, ...
ACM Transactions on Embedded Computing Systems (TECS) 12 (2s), 1-26, 2013
1742013
An analyzable memory controller for hard real-time CMPs
M Paolieri, E Quinones, FJ Cazorla, M Valero
IEEE Embedded Systems Letters 1 (4), 86-90, 2009
1722009
A cache design for probabilistically analysable real-time systems
L Kosmidis, J Abella, E Quiñones, FJ Cazorla
2013 Design, Automation & Test in Europe Conference & Exhibition (DATE), 513-518, 2013
992013
On the evaluation of the impact of shared resources in multithreaded COTS processors in time-critical environments
P Radojković, S Girbal, A Grasset, E Quiñones, S Yehia, FJ Cazorla
ACM Transactions on Architecture and Code Optimization (TACO) 8 (4), 1-25, 2012
892012
On the evaluation of the impact of shared resources in multithreaded COTS processors in time-critical environments
P Radojković, S Girbal, A Grasset, E Quiñones, S Yehia, FJ Cazorla
ACM Transactions on Architecture and Code Optimization (TACO) 8 (4), 1-25, 2012
892012
WCET analysis methods: Pitfalls and challenges on their trustworthiness
J Abella, C Hernandez, E Quiñones, FJ Cazorla, PR Conmy, ...
10th IEEE International Symposium on Industrial Embedded Systems (SIES), 1-10, 2015
802015
Measurement-based probabilistic timing analysis: Lessons from an integrated-modular avionics case study
F Wartel, L Kosmidis, C Lo, B Triquet, E Quinones, J Abella, A Gogonel, ...
2013 8th IEEE International Symposium on Industrial Embedded Systems (SIES …, 2013
792013
On the comparison of deterministic and probabilistic WCET estimation techniques
J Abella, D Hardy, I Puaut, E Quiñones, FJ Cazorla
2014 26th Euromicro Conference on Real-Time Systems, 266-275, 2014
642014
Upper-bounding program execution time with extreme value theory
FJ Cazorla, T Vardanega, E Quiñones, J Abella
13th International Workshop on Worst-Case Execution Time Analysis, 2013
642013
parMERASA--multi-core execution of parallelised hard real-time applications supporting analysability
T Ungerer, C Bradatsch, M Gerdes, F Kluge, R Jahr, J Mische, ...
2013 Euromicro Conference on Digital System Design, 363-370, 2013
622013
Timing effects of DDR memory systems in hard real-time multicore architectures: Issues and solutions
M Paolieri, E Quiñones, FJ Cazorla
ACM Transactions on Embedded Computing Systems (TECS) 12 (1s), 1-26, 2013
592013
Using randomized caches in probabilistic real-time systems
E Quinones, ED Berger, G Bernat, FJ Cazorla
2009 21st Euromicro Conference on Real-Time Systems, 129-138, 2009
582009
Assessing the suitability of the NGMP multi-core processor in the space domain
M Fernández, R Gioiosa, E Quiñones, L Fossati, M Zulianello, FJ Cazorla
Proceedings of the tenth ACM international conference on Embedded software …, 2012
542012
Code Lo, Tullio Vardanega, Leonidas Kosmidis, Jaume Abella, Enrico Mezzetti, Eduardo Quinones, Francisco J. Cazorla, Measurement-Based Probabilistic Timing Analysis for Multi …
L Cucu-Grosjean, L Santinelli, M Houston
Proceedings of the 2012 24th Euromicro Conference on Real-Time Systems, 91-101, 2012
542012
Probabilistic timing analysis on conventional cache designs
L Kosmidis, C Curtsinger, E Quiñones, J Abella, E Berger, FJ Cazorla
2013 Design, Automation & Test in Europe Conference & Exhibition (DATE), 603-606, 2013
532013
Bus designs for time-probabilistic multicore processors
J Jalle, L Kosmidis, J Abella, E Quiñones, FJ Cazorla
2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2014
502014
A dual-criticality memory controller (DCmc): Proposal and evaluation of a space case study
J Jalle, E Quinones, J Abella, L Fossati, M Zulianello, FJ Cazorla
2014 IEEE Real-Time Systems Symposium, 207-217, 2014
492014
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Artículos 1–20