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Julián Viejo Cortés
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Python as a hardware description language: A case study
JI Villar, J Juan, MJ Bellido, J Viejo, D Guerrero, J Decaluwe
2011 VII Southern Conference on Programmable Logic (SPL), 117-122, 2011
352011
Un ejemplo de implemetación de una distribución Linux en un SoC basado en hardware Linux
A Muñoz, E Ostúa, P Ruiz, MJ Bellido, J Viejo, A Millan, J Juan, ...
Actas de las IV jornadas de computación reconfigurable y aplicaciones (JCRA …, 2007
142007
Design and implementation of a SNTP client on FPGA
J Viejo, J Juan, MJ Bellido, E Ostua, A Millan, P Ruiz-de-Clavijo, A Munoz, ...
2008 IEEE International Symposium on Industrial Electronics, 1971-1975, 2008
112008
Efficient Design and Implementation on FPGA of a MicroBlaze Peripheral for Processing Direct Electrical Networks Measurements.
J Viejo, MJ Bellido, A Millán, E Ostúa, J Juan, P Ruiz-de-Clavijo, ...
IES, 1-7, 2006
112006
Digital data processing peripheral design for an embedded application based on the microblaze soft core
E Ostua, J Viejo, MJ Bellido, A Millan, J Juan, A Munoz
2008 4th Southern Conference on Programmable Logic, 197-200, 2008
102008
Fast hardware implementations of static P systems
J Quiros, S Verlan, J Viejo, A Millan, MJ Bellido
Computing and Informatics 35 (3), 687-718, 2016
82016
Efficient design of a FFT/IFFT-64 module on ASIC
A Millan, MJ Bellido, J Juan, P Ruiz-de Clavijo, D Guerrero, E Ostua, ...
Proc. XI Iberchip Workshop (IWS), Salvador de Bahia (Brazil), 305-306, 2005
72005
Long-term on-chip verification of systems with logical events scattered in time
J Viejo, JI Villar, J Juan, A Millán, E Ostúa, J Quiros
Microprocessors and Microsystems 36 (5), 402-408, 2012
52012
Fast-convergence microsecond-accurate clock discipline algorithm for hardware implementation
J Viejo, J Juan, MJ Bellido, A Millán, P Ruiz-de-Clavijo
IEEE Transactions on Instrumentation and Measurement 60 (12), 3961-3963, 2011
52011
Design of a FFT/IFFT module as an IP core suitable for embedded systems
J Viejo, A Millán, MJ Bellido, J Juan, P Ruiz-de-Clavijo, D Guerrero, ...
2007 International Symposium on Industrial Embedded Systems, 337-340, 2007
52007
Application of internode model to global power consumption estimation in SCMOS gates
A Millán Calderón, MJ Bellido Díaz, J Juan-Chico, P Ruiz de Clavijo, ...
International Workshop on Power and Timing Modeling, Optimization and …, 2005
52005
Static power consumption in CMOS gates using independent bodies
D Guerrero, A Millán, J Juan, MJ Bellido, P Ruiz-de-Clavijo, E Ostúa, ...
International Workshop on Power and Timing Modeling, Optimization and …, 2007
42007
Improving the performance of static CMOS gates by using independent bodies
D Guerrero, A Millán, J Juan, MJ Bellido, P Ruiz-De-Clavijo, E Ostúa, ...
Journal of Low Power Electronics 3 (1), 70-77, 2007
42007
Implementation of a FFT/IFFT module on FPGA: Comparison of methodologies
J Viejo, A Millan, MJ Bellido, E Ostua, P Ruiz-de-Clavijo, A Munoz
2008 4th Southern Conference on Programmable Logic, 7-11, 2008
32008
Logic-level fast current simulation for digital cmos circuits
P Ruiz de Clavijo, J Juan-Chico, MJ Bellido Díaz, A Millán Calderón, ...
International Workshop on Power and Timing Modeling, Optimization and …, 2005
32005
High-Performance Time Server Core for FPGA System-on-Chip
J Viejo, J Juan-Chico, MJ Bellido, P Ruiz-de-Clavijo, D Guerrero, E Ostua, ...
Electronics 8 (5), 528, 2019
22019
Minimalistic SDHC-SPI hardware reader module for boot loader applications
P Ruiz-de-Clavijo, E Ostúa, MJ Bellido, J Juan, J Viejo, D Guerrero
Microelectronics journal 67, 32-37, 2017
22017
La primera experiencia en el diseño de sistemas digitales sobre FPGAs
J Viejo, E Ostua, MJ Bellido, J Juan, DGYA MUÑOZ
TAEE 2008. Zaragoza, Spain, July 2008, 2008
22008
Accurate logic-level current estimation for digital CMOS circuits
P Ruiz-de-Clavijo, J Juan-Chico, MJ Bellido, A Millán, D Guerrero, ...
Journal of Low Power Electronics 2 (1), 87-94, 2006
22006
A SOC design methodology for LEON2 on FPGA
E Ostúa, JJ Chico, J Viejo, MJ Bellido, D Guerrero, A Millán, ...
Proc. 12th Iberchip Workshop (IWS), 242-245, 0
2
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