| Specification and design of embedded systems DD Gajski, F Vahid, S Narayan, J Gong Prentice-Hall, Inc., 1994 | 927 | 1994 |
| Embedded system design: a unified hardware/software introduction F Vahid, TD Givargis John Wiley & Sons, 2001 | 652 | 2001 |
| A highly configurable cache architecture for embedded systems C Zhang, F Vahid, W Najjar 30th Annual International Symposium on Computer Architecture, 2003 …, 2003 | 411 | 2003 |
| Specification and design of embedded hardware-software systems DD Gajski, F Vahid IEEE Design & Test of Computers 12 (1), 53-67, 1995 | 285 | 1995 |
| A survey on concepts, applications, and challenges in cyber-physical systems. V Gunes, S Peter, T Givargis, F Vahid KSII Transactions on Internet & Information Systems 8 (12), 2014 | 255 | 2014 |
| System-level exploration for pareto-optimal configurations in parameterized systems-on-a-chip T Givargis, F Vahid, J Henkel IEEE/ACM International Conference on Computer Aided Design. ICCAD 2001. IEEE …, 2001 | 238 | 2001 |
| A quantitative analysis of the speedup factors of FPGAs over processors Z Guo, W Najjar, F Vahid, K Vissers Proceedings of the 2004 ACM/SIGDA 12th international symposium on Field …, 2004 | 209 | 2004 |
| Platune: A tuning framework for system-on-a-chip platforms T Givargis, F Vahid IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2002 | 205 | 2002 |
| Dynamic hardware/software partitioning: A first approach G Stitt, R Lysecky, F Vahid Proceedings of the 40th annual Design Automation Conference, 250-255, 2003 | 202 | 2003 |
| A binary-constraint search algorithm for minimizing hardware during hardware/software partitioning F Vahid, DD Gajski, J Gong EURO-DAC 94, 214-219, 1994 | 173 | 1994 |
| A self-tuning cache architecture for embedded systems C Zhang, F Vahid, R Lysecky ACM Transactions on Embedded Computing Systems (TECS) 3 (2), 407-425, 2004 | 172 | 2004 |
| Warp processors R Lysecky, G Stitt, F Vahid ACM Transactions on Design Automation of Electronic Systems (TODAES) 11 (3 …, 2004 | 170 | 2004 |
| SpecSyn: An environment supporting the specify-explore-refine paradigm for hardware/software system design DD Gajski, F Vahid, S Narayan, J Gong IEEE Transactions on Very Large Scale Integration (VLSI) Systems 6 (1), 84-100, 1998 | 149 | 1998 |
| A way-halting cache for low-energy high-performance systems C Zhang, F Vahid, J Yang, W Najjar ACM Transactions on Architecture and Code Optimization (TACO) 2 (1), 34-54, 2005 | 146 | 2005 |
| Specification partitioning for system design F Vahid, D Gajski DAC 92, 219-224, 1992 | 146 | 1992 |
| Fast configurable-cache tuning with a unified second-level cache A Gordon-Ross, F Vahid, ND Dutt IEEE Transactions on Very Large Scale Integration (VLSI) Systems 17 (1), 80-91, 2008 | 143 | 2008 |
| A study of the speedups and competitiveness of FPGA soft processor cores using dynamic hardware/software partitioning R Lysecky, F Vahid Design, Automation and Test in Europe, 18-23, 2005 | 139 | 2005 |
| Automatic tuning of two-level caches to embedded applications A Gordon-Ross, F Vahid, N Dutt Proceedings Design, Automation and Test in Europe Conference and Exhibition …, 2004 | 131 | 2004 |
| Energy savings and speedups from partitioning critical software loops to hardware in embedded systems G Stitt, F Vahid, S Nematbakhsh ACM Transactions on Embedded Computing Systems (TECS) 3 (1), 218-232, 2004 | 129 | 2004 |
| A system-design methodology: Executable-specification refinement DD Gajski, F Vahid, S Narayan Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC, 458-463, 1994 | 126 | 1994 |
