Photonic networks-on-chip for future generations of chip multiprocessors A Shacham, K Bergman, LP Carloni IEEE Transactions on Computers 57 (9), 1246-1260, 2008 | 962 | 2008 |
Theory of latency-insensitive design LP Carloni, KL McMillan, AL Sangiovanni-Vincentelli IEEE Transactions on computer-aided design of integrated circuits and …, 2001 | 492 | 2001 |
On the design of a photonic network-on-chip A Shacham, K Bergman, LP Carloni First International Symposium on Networks-on-Chip (NOCS'07), 53-64, 2007 | 378 | 2007 |
Creation of structured data from plain text A Saldanha, PC Mcgeer, L Carloni US Patent 6,714,939, 2004 | 283 | 2004 |
Benefits and challenges for platform-based design A Sangiovanni-Vincentelli, L Carloni, F De Bernardinis, M Sgroi Proceedings of the 41st Annual Design Automation Conference, 409-414, 2004 | 225 | 2004 |
Languages and tools for hybrid systems design LP Carloni, R Passerone, A Pinto now Publishers Inc, 2006 | 223 | 2006 |
A methodology for correct-by-construction latency insensitive design LP Carloni, KL McMillan, A Saldanha, AL Sangiovanni-Vincentelli The Best of ICCAD, 143-158, 2003 | 223 | 2003 |
Networks-on-chip in emerging interconnect paradigms: Advantages and challenges LP Carloni, P Pande, Y Xie 2009 3rd ACM/IEEE International Symposium on Networks-on-Chip, 93-102, 2009 | 219 | 2009 |
Efficient synthesis of networks on chip A Pinto, LP Carloni, AL Sangiovanni-Vincentelli Proceedings 21st International Conference on Computer Design, 146-150, 2003 | 181 | 2003 |
Coping with latency in SoC design LP Carloni, A Sangiovanni-Vincentelli IEEE Micro 22 (5), 24-35, 2002 | 179 | 2002 |
Photonic NoC for DMA communications in chip multiprocessors A Shacham, BG Lee, A Biberman, K Bergman, LP Carloni 15th Annual IEEE Symposium on High-Performance Interconnects (HOTI 2007), 29-38, 2007 | 171 | 2007 |
Phoenixsim: A simulator for physical-layer analysis of chip-scale photonic interconnection networks J Chan, G Hendry, A Biberman, K Bergman, LP Carloni 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010 …, 2010 | 161 | 2010 |
Creation of structured data from plain text A Saldanha, P McGreer, L Carloni US Patent 7,324,936, 2008 | 152 | 2008 |
On learning-based methods for design-space exploration with high-level synthesis HY Liu, LP Carloni Proceedings of the 50th annual design automation conference, 1-7, 2013 | 149 | 2013 |
Physical-layer modeling and system-level design of chip-scale photonic interconnection networks J Chan, G Hendry, K Bergman, LP Carloni IEEE Transactions on computer-aided design of integrated circuits and …, 2011 | 130 | 2011 |
A 2.5 D integrated voltage regulator using coupled-magnetic-core inductors on silicon interposer N Sturcken, EJ O'Sullivan, N Wang, P Herget, BC Webb, LT Romankiw, ... IEEE Journal of solid-state circuits 48 (1), 244-254, 2012 | 122 | 2012 |
Photonic network-on-chip design K Bergman, LP Carloni, A Biberman, J Chan, G Hendry Springer New York, 2014 | 114 | 2014 |
Design exploration of optical interconnection networks for chip multiprocessors M Petracca, BG Lee, K Bergman, LP Carloni 2008 16th IEEE Symposium on High Performance Interconnects, 31-40, 2008 | 104 | 2008 |
Constraint-driven communication synthesis A Pinto, LP Carloni, AL Sangiovanni-Vincentelli Proceedings of the 39th annual Design Automation Conference, 783-788, 2002 | 104 | 2002 |
The case for low-power photonic networks on chip A Shacham, K Bergman, LP Carloni 2007 44th ACM/IEEE Design Automation Conference, 132-135, 2007 | 103 | 2007 |