| An analysis of accelerator coupling in heterogeneous architectures EG Cota, P Mantovani, G Di Guglielmo, LP Carloni Proceedings of the 52Nd Annual Design Automation Conference, 1-6, 2015 | 106 | 2015 |
| Agile SoC development with open ESP P Mantovani, D Giri, G Di Guglielmo, L Piccolboni, J Zuckerman, EG Cota, ... Proceedings of the 39th International Conference on Computer-Aided Design, 1-9, 2020 | 105 | 2020 |
| A switched-inductor integrated voltage regulator with nonlinear feedback and network-on-chip load in 45 nm SOI N Sturcken, M Petracca, S Warren, P Mantovani, LP Carloni, ... IEEE Journal of Solid-State Circuits 47 (8), 1935-1945, 2012 | 74 | 2012 |
| COSMOS: Coordination of high-level synthesis and memory optimization for hardware accelerators L Piccolboni, P Mantovani, GD Guglielmo, LP Carloni ACM Transactions on Embedded Computing Systems (TECS) 16 (5s), 1-22, 2017 | 57 | 2017 |
| ESP4ML: Platform-based design of systems-on-chip for embedded machine learning D Giri, KL Chiu, G Di Guglielmo, P Mantovani, LP Carloni 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2020 | 47 | 2020 |
| An FPGA-based infrastructure for fine-grained DVFS analysis in high-performance embedded systems P Mantovani, EG Cota, K Tien, C Pilato, G Di Guglielmo, K Shepard, ... Proceedings of the 53rd Annual Design Automation Conference, 1-6, 2016 | 46 | 2016 |
| System-level optimization of accelerator local memory for heterogeneous systems-on-chip C Pilato, P Mantovani, G Di Guglielmo, LP Carloni IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2016 | 44 | 2016 |
| Accelerators and coherence: An SoC perspective D Giri, P Mantovani, LP Carloni IEEE Micro 38 (6), 36-45, 2018 | 38 | 2018 |
| High-level synthesis of accelerators in embedded scalable platforms P Mantovani, G Di Guglielmo, LP Carloni 2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC), 204-211, 2016 | 37 | 2016 |
| NoC-based support of heterogeneous cache-coherence models for accelerators D Giri, P Mantovani, LP Carloni 2018 Twelfth IEEE/ACM International Symposium on Networks-on-Chip (NOCS), 1-8, 2018 | 35 | 2018 |
| Handling large data sets for high-performance embedded applications in heterogeneous systems-on-chip P Mantovani, EG Cota, C Pilato, G Di Guglielmo, LP Carloni Proceedings of the International Conference on Compilers, Architectures and …, 2016 | 35 | 2016 |
| Accelerator memory reuse in the dark silicon era EG Cota, P Mantovani, M Petracca, MR Casu, LP Carloni IEEE Computer Architecture Letters 13 (1), 9-12, 2012 | 29 | 2012 |
| System-level memory optimization for high-level synthesis of component-based SoCs C Pilato, P Mantovani, G Di Guglielmo, LP Carloni Proceedings of the 2014 International Conference on Hardware/Software …, 2014 | 22 | 2014 |
| Broadening the exploration of the accelerator design space in embedded scalable platforms L Piccolboni, P Mantovani, G Di Guglielmo, LP Carloni 2017 IEEE High Performance Extreme Computing Conference (HPEC), 1-7, 2017 | 21 | 2017 |
| Accelerator Integration for Open-Source SoC Design D Giri, KL Chiu, G Eichler, P Mantovani, LP Carloni IEEE Micro 41 (4), 8-14, 2021 | 19 | 2021 |
| Cohmeleon: Learning-based orchestration of accelerator coherence in heterogeneous socs J Zuckerman, D Giri, J Kwon, P Mantovani, LP Carloni MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture …, 2021 | 18 | 2021 |
| A 12nm Agile-Designed SoC for Swarm-Based Perception with Heterogeneous IP Blocks, a Reconfigurable Memory Hierarchy, and an 800MHz Multi-Plane NoC T Jia, P Mantovani, MC Dos Santos, D Giri, J Zuckerman, EJ Loscalzo, ... ESSCIRC 2022-IEEE 48th European Solid State Circuits Conference (ESSCIRC …, 2022 | 17 | 2022 |
| HL5: A 32-bit RISC-V Processor Designed with High-Level Synthesis P Mantovani, R Margelli, D Giri, LP Carloni 2020 IEEE Custom Integrated Circuits Conference (CICC), 1-8, 2020 | 14 | 2020 |
| On the design of scalable and reusable accelerators for big data applications C Pilato, Q Xu, P Mantovani, G Di Guglielmo, LP Carloni Proceedings of the ACM International Conference on Computing Frontiers, 406-411, 2016 | 12 | 2016 |
| Exploiting private local memories to reduce the opportunity cost of accelerator integration EG Cota, P Mantovani, LP Carloni Proceedings of the 2016 International Conference on Supercomputing, 1-12, 2016 | 11 | 2016 |
Luca CarloniProfessor and Chair of Computer Science, Columbia UniversityDirección de correo verificada de cs.columbia.edu
