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ILIAS CHLIS
ILIAS CHLIS
Analog/RF IC designer, Hanwha Phasor
Dirección de correo verificada de columbia.edu - Página principal
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A 112-Gb/s PAM-4 long-reach wireline transceiver using a 36-way time-interleaved SAR ADC and inverter-based RX analog front-end in 7-nm FinFET
J Im, K Zheng, CHA Chou, L Zhou, JW Kim, S Chen, Y Wang, HW Hung, ...
IEEE Journal of Solid-State Circuits 56 (1), 7-18, 2020
1302020
A 112GB/S PAM4 wireline receiver using a 64-way time-interleaved SAR ADC in 16NM FinFET
J Hudner, D Carey, R Casey, K Hearne, PWAF Neto, I Chlis, M Erett, ...
2018 IEEE Symposium on VLSI Circuits, 47-48, 2018
352018
Analyses and techniques for phase noise reduction in CMOS Colpitts oscillator topology
I Chlis, D Pepe, D Zito
International Journal of Circuit Theory and Applications 44 (3), 616-638, 2016
272016
Transformer-based input integrated matching in cascode amplifiers: Analytical proofs
D Pepe, I Chlis, D Zito
IEEE Transactions on Circuits and Systems I: Regular Papers 65 (5), 1495-1504, 2017
202017
Comparative analyses of phase noise in 28 nm CMOS LC oscillator circuit topologies: Hartley, Colpitts, and common-source cross-coupled differential pair
I Chlis, D Pepe, D Zito
The Scientific World Journal 2014, 2014
192014
A 112–134-gb/s pam4 receiver using a 36-way dual-comparator ti-sar adc in 7-nm finfet
PWAF Neto, K Hearne, I Chlis, D Carey, R Casey, B Griffin, ...
IEEE Solid-State Circuits Letters 3, 138-141, 2020
132020
Analysis of phase noise in 28 nm CMOS LC oscillator differential topologies: Armstrong, Colpitts, Hartley and common-source cross-coupled pair
I Chlis, D Pepe, D Zito
Journal of Circuits, Systems and Computers 24 (04), 1550052, 2015
132015
Phase Noise comparative analysis of LC oscillators in 28-nm CMOS through the Impulse Sensitivity Function
I Chlis, D Pepe, D Zito
Proceedings of the 2013 9th Conference on Ph. D. Research in …, 2013
132013
Ultra-low voltage drain-bulk connected MOS transistors in weak and moderate inversion
A Dimakos, M Bucher, RK Sharma, I Chlis
2012 19th IEEE International Conference on Electronics, Circuits, and …, 2012
102012
Comparative analyses of phase noise in differential oscillator topologies in 28 nm CMOS technology
I Chlis, D Pepe, D Zito
2014 10th Conference on Ph. D. Research in Microelectronics and Electronics …, 2014
82014
67 GHz three‐spiral transformer CMOS oscillator
D Pepe, I Chlis, D Zito
International Journal of Circuit Theory and Applications 44 (10), 1798-1813, 2016
72016
Transformer‐coupled π‐network differential CMOS oscillator circuit topology
I Chlis, D Pepe, D Zito
International Journal of Circuit Theory and Applications 45 (3), 407-418, 2017
52017
Analyses and techniques for phase noise reduction in CMOS Hartley oscillator topology
I Chlis, D Pepe, D Zito
International Journal of Circuit Theory and Applications 45 (12), 1993-2016, 2017
42017
Phase noise analysis in CMOS differential Armstrong oscillator topology
I Chlis, D Pepe, D Zito
International Journal of Circuit Theory and Applications 44 (9), 1697-1705, 2016
42016
Transformer-based input integrated matching in cascode amplifier: Circuit analysis and comparison with inductive degeneration
D Pepe, I Chlis, D Zito
2016 27th Irish Signals and Systems Conference (ISSC), 1-5, 2016
42016
50 GHz active-LC CMOS oscillator: Theoretical study and experimental proofs
D Pepe, I Chlis, D Zito
Radio Science 52 (9), 1117-1128, 2017
32017
A novel differential Hartley CMOS oscillator circuit topology
I Chlis, D Pepe, D Zito
2016 27th Irish Signals and Systems Conference (ISSC), 1-3, 2016
32016
Programmable buffering, bandwidth extension and pre-emphasis of a track-and-hold circuit using series inductance
R Casey, CF Poon, I Chlis, J Cho
US Patent 10,291,192, 2019
22019
Analyses of phase noise reduction techniques in CMOS Hartley oscillator topology at the mm-waves: noise filter and optimum current density
I Chlis, D Pepe, D Zito
2015 IEEE 15th Mediterranean Microwave Symposium (MMS), 1-4, 2015
22015
Analyses of phase noise reduction techniques in CMOS Colpitts oscillator topology at the mm-waves: Noise filter and optimum current density
I Chlis, D Pepe, D Zito
2015 11th Conference on Ph. D. Research in Microelectronics and Electronics …, 2015
22015
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Artículos 1–20