Jose Flich
Jose Flich
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Segment-based routing: An efficient fault-tolerant routing algorithm for meshes and tori
A Mejia, J Flich, J Duato, SA Reinemo, T Skeie
Proceedings 20th IEEE International Parallel & Distributed Processing …, 2006
A new scalable and cost-effective congestion management strategy for lossless multistage interconnection networks
J Duato, I Johnson, J Flich, F Naven, P Garcia, T Nachiondo
11th International Symposium on High-Performance Computer Architecture, 108-119, 2005
A survey and evaluation of topology-agnostic deterministic routing algorithms
J Flich, T Skeie, A Mejia, O Lysne, P Lopez, A Robles, J Duato, ...
IEEE Transactions on Parallel and Distributed Systems 23 (3), 405-425, 2011
Efficient unicast and multicast support for CMPs
S Rodrigo, J Flich, J Duato, M Hummel
2008 41st IEEE/ACM International Symposium on Microarchitecture, 364-375, 2008
Addressing manufacturing challenges with cost-efficient fault tolerant routing
S Rodrigo, J Flich, A Roca, S Medardoni, D Bertozzi, J Camacho, F Silla, ...
2010 Fourth ACM/IEEE International Symposium on Networks-on-Chip, 25-32, 2010
Designing network on-chip architectures in the nanoscale era
J Flich, D Bertozzi
CRC press, 2010
A routing methodology for achieving fault tolerance in direct networks
ME Gomez, NA Nordbotten, J Flich, P Lopez, A Robles, J Duato, T Skeie, ...
IEEE transactions on Computers 55 (4), 400-415, 2006
Logic-based distributed routing for NoCs
J Flich, J Duato
IEEE computer architecture letters 7 (1), 13-16, 2008
Path-based partitioning methods for 3D networks-on-chip with minimal adaptive routing
M Ebrahimi, M Daneshtalab, P Liljeberg, J Plosila, J Flich, H Tenhunen
IEEE Transactions on Computers 63 (3), 718-733, 2012
Region-based routing: An efficient routing mechanism to tackle unreliable hardware in network on chips
J Flich, A Mejia, P Lopez, J Duato
First International Symposium on Networks-on-Chip (NOCS'07), 183-194, 2007
Region-based routing: a mechanism to support efficient routing algorithms in NoCs
A Mejia, M Palesi, J Flich, S Kumar, P López, R Holsmark, J Duato
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 17 (3), 356-369, 2009
An efficient implementation of distributed routing algorithms for NoCs
J Flich, S Rodrigo, J Duato
Second ACM/ieee international symposium on networks-on-chip (NOCs 2008), 87-96, 2008
An efficient fault-tolerant routing methodology for meshes and tori
ME Gomez, J Duato, J Flich, P Lopez, A Robles, NA Nordbotten, O Lysne, ...
IEEE Computer Architecture Letters 3 (1), 3-3, 2004
Method for congestion management of a network, a signalling protocol, a switch, an end station and a network
F Naven, ID Johnson, J Duato, J Flich
US Patent 8,174,978, 2012
Efficient implementation of distributed routing algorithms for NoCs
S Rodrigo, S Medardoni, J Flich, D Bertozzi, J Duato
IET computers & digital techniques 3 (5), 460-475, 2009
An efficient and deadlock-free network reconfiguration protocol
O Lysne, JM Montanana, J Flich, J Duato, TM Pinkston, T Skeie
IEEE Transactions on Computers 57 (6), 762-779, 2008
Efficient, scalable congestion management for interconnection networks
PJ García, FJ Quiles, J Flich, J Duato, I Johnson, F Naven
IEEE Micro 26 (5), 52-66, 2006
LASH-TOR: A generic transition-oriented routing algorithm
T Skeie, O Lysne, J Flich, P Lopez, A Robles, J Duato
Proceedings. Tenth International Conference on Parallel and Distributed …, 2004
Improving routing performance in Myrinet networks
J Flich, MP Malumbres, P Lopez, J Duato
Proceedings 14th International Parallel and Distributed Processing Symposium …, 2000
Cost-efficient on-chip routing implementations for CMP and MPSoC systems
S Rodrigo, J Flich, A Roca, S Medardoni, D Bertozzi, J Camacho, F Silla, ...
IEEE transactions on computer-aided design of integrated circuits and …, 2011
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