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Nicola Da Dalt
Nicola Da Dalt
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A design-oriented study of the nonlinear dynamics of digital bang-bang PLLs
N Da Dalt
IEEE Transactions on Circuits and Systems I: Regular Papers 52 (1), 21-31, 2005
2022005
On the jitter requirements of the sampling clock for analog-to-digital converters
N Da Dalt, M Harteneck, C Sandner, A Wiesbauer
IEEE Transactions on Circuits and Systems I: Fundamental Theory and …, 2002
1682002
Linearized analysis of a digital bang-bang PLL and its validity limits applied to jitter transfer and jitter generation
N Da Dalt
IEEE Transactions on Circuits and Systems I: Regular Papers 55 (11), 3663-3675, 2008
1252008
Markov chains-based derivation of the phase detector gain in bang-bang PLLs
N Da Dalt
IEEE Transactions on Circuits and Systems II: Express Briefs 53 (11), 1195-1199, 2006
1172006
A compact triple-band low-jitter digital LC PLL with programmable coil in 130-nm CMOS
N Da Dalt, E Thaller, P Gregorius, L Gazsi
IEEE Journal of Solid-State Circuits 40 (7), 1482-1490, 2005
992005
A 1.4 ps rms-period-jitter TDC-less fractional-N digital PLL with digitally controlled ring oscillator in 65nm CMOS
W Grollitsch, R Nonis, N Da Dalt
Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2010 …, 2010
972010
Modeling, design and characterization of a new low-jitter analog dual tuning LC-VCO PLL architecture
R Nonis, N Da Dalt, P Palestri, L Selmi
IEEE Journal of Solid-State Circuits 40 (6), 1303-1309, 2005
872005
Understanding jitter and phase noise: A circuits and systems perspective
N Da Dalt, A Sheikholeslami
Cambridge University Press, 2018
772018
A subpicosecond jitter PLL for clock generation in 0.12-μm digital CMOS
N Da Dalt, C Sandner
IEEE Journal of Solid-State Circuits 38 (7), 1275-1278, 2003
75*2003
digPLL-Lite: A low-complexity, low-jitter fractional-N digital PLL architecture
R Nonis, W Grollitsch, T Santa, D Cherniak, N Da Dalt
IEEE journal of solid-state circuits 48 (12), 3134-3145, 2013
742013
Multi-mode/Multi-band RF transceivers for wireless communications: Advanced techniques, Architectures, and Trends
G Hueber, RB Staszewski
John Wiley & Sons, 2011
732011
A 10b 10GHz digitally controlled LC oscillator in 65nm CMOS
D Dalt
2006 IEEE International Solid State Circuits Conference-Digest of Technical …, 2006
642006
A 0.06 mm11 mW Local Oscillator for the GSM Standard in 65 nm CMOS
S Dal Toso, A Bevilacqua, M Tiebout, N Da Dalt, A Gerosa, A Neviani
IEEE Journal of Solid-State Circuits 45 (7), 1295-1304, 2010
512010
An Analysis of Phase Noise in Realigned VCOs
N Da Dalt
Circuits and Systems II: Express Briefs, IEEE Transactions on 61 (3), 2014
442014
A fully integrated 13 GHz/spl Delta//spl Sigma/fractional-n PLL in 0.13/spl mu/m CMOS
M Tiebout, C Sandner, HD Wohlmuth, N Da Dalt, E Thaller
2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No …, 2004
432004
Method and device for generating a clock signal using a phase difference signal and a feedback signal
N Da Dalt, P Gregorius
US Patent 7,282,999, 2007
362007
Theory and implementation of digital bang-bang frequency synthesizers for high speed serial data communications
N Da Dalt
Diplom-Ingenieur Dissertation, 2007
362007
Digital phase-locked loop
N Da Dalt, C Sandner
US Patent 6,970,046, 2005
322005
Dynamics of induced modulational instability in waveguides with saturable nonlinearity
N Da Dalt, C De Angelis, GF Nalesso, M Santagiustina
Optics communications 121 (1-3), 69-72, 1995
311995
An Integrated Divide-by-Two Direct Injection-Locking Frequency Divider for BandsThrough
S Dal Toso, A Bevilacqua, M Tiebout, N Da Dalt, A Gerosa, A Neviani
IEEE Transactions on Microwave Theory and Techniques 58 (7), 1686-1695, 2010
292010
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