| Trading wind generation from short-term probabilistic forecasts of wind power P Pinson, C Chevallier, GN Kariniotakis IEEE transactions on Power Systems 22 (3), 1148-1156, 2007 | 716 | 2007 |
| Cross point memory array using multiple thin films D Rinerson, SW Longcor, ER Ward, SKR Hsia, W Kinney, CJ Chevallier US Patent 6,753,561, 2004 | 289 | 2004 |
| Re-writable memory with non-linear memory element D Rinerson, CJ Chevallier, SW Longcor, W Kinney, ER Ward, SKR Hsia US Patent 6,870,755, 2005 | 253 | 2005 |
| Memory using mixed valence conductive oxides D Rinerson, C Chevallier, W Kinney, R Lambertson, S Longcor, ... US Patent App. 11/095,026, 2006 | 231 | 2006 |
| Memory system having programmable control parameters FF Roohparvar, DD Rinerson, CJ Chevallier, MS Briner US Patent 5,801,985, 1998 | 228 | 1998 |
| Preservation circuit and methods to maintain values representing data in one or more layers of memory CJ Chevallier, R Norman US Patent 7,719,876, 2010 | 215 | 2010 |
| Discharge of conductive array lines in fast memory C Chevallier, D Rinerson US Patent 7,020,006, 2006 | 179 | 2006 |
| Conductive memory device with conductive oxide electrodes D Rinerson, SW Longcor, SKR Hsia, W Kinney, ER Ward, CJ Chevallier US Patent 7,067,862, 2006 | 176 | 2006 |
| Memory using variable tunnel barrier widths D Rinerson, C Chevallier, W Kinney, E Ward US Patent 7,538,338, 2009 | 152 | 2009 |
| Integrated circuit with temperature detector CJ Chevallier US Patent 5,875,142, 1999 | 151 | 1999 |
| Cross point memory array using multiple modes of operation D Rinerson, CJ Chevallier, SW Longcor, ER Ward, W Kinney, SKR Hsia US Patent 6,834,008, 2004 | 146 | 2004 |
| Line drivers that fit within a specified line pitch D Rinerson, CJ Chevallier US Patent 6,836,421, 2004 | 137 | 2004 |
| A 0.13 µm 64Mb multi-layered conductive metal-oxide memory CJ Chevallier, CH Siau, SF Lim, SR Namala, M Matsuoka, BL Bateman, ... 2010 IEEE International Solid-State Circuits Conference-(ISSCC), 260-261, 2010 | 134 | 2010 |
| Providing a reference voltage to a cross point memory array D Rinerson, CJ Chevallier, SW Longcor, ER Ward, W Kinney, SKR Hsia US Patent 6,970,375, 2005 | 134 | 2005 |
| Threshold device for a memory array D Rinerson, JC Brewer, CJ Chevallier, W Kinney, R Lambertson, ... US Patent 7,995,371, 2011 | 123 | 2011 |
| Apparatus and method for detecting over-programming condition in multistate memory device RD Norman, CJ Chevallier US Patent 7,457,997, 2008 | 123 | 2008 |
| Resistive memory device with a treated interface D Rinerson, W Kinney, JE Sanchez Jr, SW Longcor, SKR Hsia, E Ward, ... US Patent 7,326,979, 2008 | 122 | 2008 |
| Integrated circuit with temperature detector CJ Chevallier US Patent 6,002,627, 1999 | 122 | 1999 |
| Power level detection circuit CJ Chevallier, FF Roohparvar, MS Briner US Patent 5,581,206, 1996 | 120 | 1996 |
| Memory array of a non-volatile ram D Rinerson, CJ Chevallier US Patent 6,859,382, 2005 | 119 | 2005 |
