Juha-Pekka Soininen
Juha-Pekka Soininen
Verified email at vtt.fi
TitleCited byYear
A network on chip architecture and design methodology
S Kumar, A Jantsch, JP Soininen, M Forsell, M Millberg, J Oberg, ...
Proceedings IEEE Computer Society Annual Symposium on VLSI. New Paradigms …, 2002
Semantic interoperability architecture for pervasive computing and internet of things
J Kiljander, A D’elia, F Morandi, P Hyttinen, J Takalo-Mattila, ...
IEEE access 2, 856-873, 2014
Providing network connectivity for small appliances: a functionally minimized embedded Web server
J Riihijarvi, P Mahonen, MJ Saaranen, J Roivainen, JP Soininen
IEEE Communications Magazine 39 (10), 74-79, 2001
Combining UML2 application and SystemC platform modelling for performance evaluation of real-time embedded systems
J Kreku, M Hoppari, T Kestilä, Y Qu, JP Soininen, P Andersson, ...
EURASIP Journal on Embedded Systems 2008, 1-18, 2008
Enabling semantic technology empowered smart spaces
J Kiljander, A Ylisaukko-oja, J Takalo-Mattila, M Eteläperä, JP Soininen
Journal of Computer Networks and Communications 2012, 2012
Static scheduling techniques for dependent tasks on dynamically reconfigurable devices
Y Qu, JP Soininen, J Nurmi
Journal of Systems Architecture 53 (11), 861-876, 2007
A parallel configuration model for reducing the run-time reconfiguration overhead
Y Qu, JP Soininen, J Nurmi
Proceedings of the Design Automation & Test in Europe Conference 1, 1-6, 2006
Smart water management platform: Iot-based precision irrigation for agriculture
C Kamienski, JP Soininen, M Taumberger, R Dantas, A Toscano, ...
Sensors 19 (2), 276, 2019
Extending platform-based design to network on chip systems
JP Soininen, A Jantsch, M Forsell, A Pelkonen, J Kreku, S Kumar
16th International Conference on VLSI Design, 2003. Proceedings., 401-408, 2003
Cosimulation of real-time control systems
JP Soininen, T Huttunen, K Tiensyrja, H Heusala
Proceedings of EURO-DAC. European Design Automation Conference, 170-175, 1995
Networks on chip
A Jantsch, J Soininen, M Forsell, L Zheng, S Kumar, M Millberg, J Öberg
Workshop at the European Solid State Circuits Conference, 2001
A genetic algorithm for scheduling tasks onto dynamically reconfigurable hardware
Y Qu, JP Soininen, J Nurmi
2007 IEEE International Symposium on Circuits and Systems, 161-164, 2007
Systemc-based design methodology for reconfigurable system-on-chip
Y Qu, K Tiensyrja, JP Soininen
8th Euromicro Conference on Digital System Design (DSD'05), 364-371, 2005
Knowledge sharing protocol for smart spaces
J Kiljander, F Morandi, JP Soininen
International Journal of Advanced Computer Science and Applications 3 (9), 2012
Using dynamic voltage scaling to reduce the configuration energy of run time reconfigurable devices
Y Qu, JP Soininen, J Nurmi
2007 Design, Automation & Test in Europe Conference & Exhibition, 1-6, 2007
Workload simulation method for evaluation of application feasibility in a mobile multiprocessor platform
J Kreku, J Penttila, JP Soininen, J Kansas
Euromicro Symposium on Digital System Design, 2004. DSD 2004., 532-539, 2004
Advertising semantically described physical items with Bluetooth Low Energy beacons
J Takalo-Mattila, J Kiljander, JP Soininen
2013 2nd Mediterranean Conference on Embedded Computing (MECO), 211-214, 2013
Layered UML workload and SystemC platform models for performance simulation
J Kreku, Y Qu, JP Soininen, K Tiensyrjä
Proceedings of Forum on Specification and Design Languages, 223-228, 2006
Exploitation of UML 2.0-based platform service model and SystemC workload simulation in MPEG-4 partitioning
J Kreku, M Etelapera, JP Soininen
2005 International Symposium on System-on-Chip, 167-170, 2005
Estimating the utilization of embedded FPGA co-processor
Y Qu, JP Soininen
Euromicro Symposium on Digital System Design, 2003. Proceedings., 214-221, 2003
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