| Refresh controller and memory device including the same JM Oh, H Song US Patent 9,972,377, 2018 | 82 | 2018 |
| An 80 nm 4 Gb/s/pin 32 bit 512 Mb GDDR4 graphics DRAM with low power and low noise data bus inversion SJ Bae, KI Park, JD Ihm, HY Song, WJ Lee, HJ Kim, KH Kim, YS Park, ... IEEE journal of solid-state circuits 43 (1), 121-131, 2008 | 81 | 2008 |
| Semiconductor memory device capable of performing a hammer refresh operation while performing a normal refresh operation and memory system having the same H Shin, HY Song US Patent 10,607,683, 2020 | 72 | 2020 |
| Embedded refresh controllers and memory devices including the same JM Oh, H Song, DY Kim US Patent 10,446,216, 2019 | 70 | 2019 |
| Memory device and memory system performing request-based refresh, and operating method of the memory device HJ Kim, H Song, H Chung, J Ju-Yun, CHA Sang-Uhn US Patent 9,940,991, 2018 | 64 | 2018 |
| Refresh control circuit, memory device including the same and method of operating the same for hammer refresh operation H Shin, DY Kim, H Song, DS Lee US Patent 10,811,077, 2020 | 53 | 2020 |
| Digitally-controlled DLL and I/O circuits for 500 Mb/s/pin/spl times/16 DDR SDRAM JB Lee, KH Kim, C Yoo, S Lee, OG Na, CY Lee, HY Song, JS Lee, ZH Lee, ... 2001 IEEE International Solid-State Circuits Conference. Digest of Technical …, 2001 | 44 | 2001 |
| Memory system, memory device, and output data strobe signal generating method KI Park, SJ Jang, H Song US Patent 7,362,648, 2008 | 40 | 2008 |
| Device and method for repairing memory cell and memory system including the device KM Sohn, H Song, S Hwang, C Kim, S Dong-Hyun US Patent 9,087,613, 2015 | 37 | 2015 |
| Memory device and memory system performing request-based refresh, and operating method of the memory device HJ Kim, H Song, H Chung, J Ju-Yun, CHA Sang-Uhn US Patent 10,127,974, 2018 | 36 | 2018 |
| Memory devices performing refresh operations with row hammer handling and memory systems including such memory devices H Shin, DY Kim, H Song US Patent 10,860,222, 2020 | 30 | 2020 |
| Circuit and method for calibrating resistors for active termination resistance, and memory chip having the circuit H Song US Patent 6,768,393, 2004 | 29 | 2004 |
| Semiconductor memory devices, memory systems including the same and methods of operating memory systems H Chung, CHA Sang-Uhn, H Song, HJ Kim US Patent 10,037,244, 2018 | 28 | 2018 |
| Device and method for repairing memory cell and memory system including the device KM Sohn, H Song, S Hwang, C Kim, S Dong-Hyun US Patent 9,831,003, 2017 | 28 | 2017 |
| System and method for driving columns of an active matrix display DK Jeong, G Kim, HY Song, DD Lee US Patent 6,157,360, 2000 | 28 | 2000 |
| Latency control circuit and method of latency control SB Lee, H Song US Patent 6,944,091, 2005 | 27 | 2005 |
| Semiconductor memory device and latency signal generating method thereof KI Park, YH Jun, SJ Jang, H Song US Patent 7,453,745, 2008 | 26 | 2008 |
| An 80nm 4Gb/s/pin 32b 512Mb GDDR4 graphics DRAM with low-power and low-noise data-bus inversion JD Ihm, SJ Bae, KI Park, HY Song, WJ Lee, HJ Kim, KH Kim, HK Lee, ... 2007 IEEE International Solid-State Circuits Conference. Digest of Technical …, 2007 | 26 | 2007 |
| A 1.2 Gb/s/pin double data rate SDRAM with on-die-termination HY Song, SJ Jang, JS Kwak, CS Kim, CM Kang, DH Jeong, YS Park, ... 2003 IEEE International Solid-State Circuits Conference, 2003. Digest of …, 2003 | 26 | 2003 |
| Memory module, memory device, and processing device having a processor mode, and memory system O Seong-il, NS Kim, SON Young-Hoon, C Kim, H Song, JH Ahn, S Hwang US Patent 10,416,896, 2019 | 25 | 2019 |
Woojin LeeIntel PSGVerified email at intel.com
