Rommel Sánchez Verdejo
Rommel Sánchez Verdejo
Doctoral Researcher, Barcelona Supercomputing Center
Verified email at cuevano.org
Title
Cited by
Cited by
Year
Enabling a reliable STT-MRAM main memory simulation
K Asifuzzaman, RS Verdejo, P Radojković
Proceedings of the International Symposium on Memory Systems, 283-292, 2017
82017
Main memory latency simulation: the missing link
RS Verdejo, K Asifuzzaman, M Radulovic, P Radojković, E Ayguadé, ...
Proceedings of the International Symposium on Memory Systems, 107-116, 2018
72018
Rethinking cycle accurate DRAM simulation
S Li, RS Verdejo, P Radojković, B Jacob
Proceedings of the International Symposium on Memory Systems, 184-191, 2019
52019
Microbenchmarks for Detailed Validation and Tuning of Hardware Simulators
RS Verdejo, P Radojković
2017 International Conference on High Performance Computing & Simulation …, 2017
42017
PROFET: modeling system performance and energy without simulating the CPU
M Radulovic, R Sánchez Verdejo, P Carpenter, P Radojković, B Jacob, ...
Proceedings of the ACM on Measurement and Analysis of Computing Systems 3 (2 …, 2019
12019
Detailed tuning and validation of hardware simulators through microbenchmarks
R Sánchez Verdejo, P Radojković
Book of abstracts, 57-58, 2018
2018
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Articles 1–6