Kim Hazelwood
TitleCited byYear
Pin: building customized program analysis tools with dynamic instrumentation
CK Luk, R Cohn, R Muth, H Patil, A Klauser, G Lowney, S Wallace, ...
Acm sigplan notices 40 (6), 190-200, 2005
41952005
Where is the data? Why you cannot debate CPU vs. GPU performance without the answer
C Gregg, K Hazelwood
(IEEE ISPASS) IEEE International Symposium on Performance Analysis of …, 2011
3112011
Profiling a warehouse-scale computer
S Kanev, JP Darago, K Hazelwood, P Ranganathan, T Moseley, GY Wei, ...
Proceedings of the 42nd Annual International Symposium on Computer …, 2015
2112015
Analyzing parallel programs with pin
M Bach, M Charney, R Cohn, E Demikhovsky, T Devor, K Hazelwood, ...
Computer 43 (3), 34-41, 2010
1322010
Applied machine learning at facebook: A datacenter infrastructure perspective
K Hazelwood, S Bird, D Brooks, S Chintala, U Diril, D Dzhulgakov, ...
2018 IEEE International Symposium on High Performance Computer Architecture …, 2018
1262018
Superpin: Parallelizing dynamic instrumentation for real-time performance
S Wallace, K Hazelwood
International Symposium on Code Generation and Optimization (CGO'07), 209-220, 2007
1062007
Enabling task parallelism in the cuda scheduler
M Guevara, C Gregg, K Hazelwood, K Skadron
Workshop on Programming Models for Emerging Architectures 9, 2009
962009
Fine-Grained Resource Sharing for Concurrent {GPGPU} Kernels
C Gregg, J Dorn, K Hazelwood, K Skadron
Presented as part of the 4th {USENIX} Workshop on Hot Topics in Parallelism, 2012
892012
A dynamic binary instrumentation engine for the ARM architecture
K Hazelwood, A Klauser
Proceedings of the 2006 international conference on Compilers, architecture …, 2006
872006
Adaptive online context-sensitive inlining
K Hazelwood, D Grove
International Symposium on Code Generation and Optimization, 2003. CGO 2003 …, 2003
742003
Improving region selection in dynamic optimization systems
D Hiniker, K Hazelwood, MD Smith
38th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO'05 …, 2005
632005
Eliminating voltage emergencies via microarchitectural voltage control feedback and dynamic optimization
K Hazelwood, D Brooks
Proceedings of the 2004 international symposium on Low power electronics and …, 2004
572004
Code cache management schemes for dynamic optimizers
K Hazelwood, MD Smith
Proceedings Sixth Annual Workshop on Interaction between Compilers and …, 2002
572002
Dynamic heterogeneous scheduling decisions using historical runtime data
C Gregg, M Boyer, K Hazelwood, K Skadron
Workshop on Applications for Multi-and Many-Core Processors (A4MMC), 1-12, 2011
552011
Managing bounded code caches in dynamic binary optimization systems
K Hazelwood, MD Smith
ACM Transactions on Architecture and Code Optimization (TACO) 3 (3), 263-294, 2006
542006
Exploring code cache eviction granularities in dynamic optimization systems
K Hazelwood, JE Smith
International Symposium on Code Generation and Optimization, 2004. CGO 2004 …, 2004
542004
Generational cache management of code traces in dynamic optimization systems
K Hazelwood, MD Smith
Proceedings. 36th Annual IEEE/ACM International Symposium on …, 2003
542003
Tradeoffs between power management and tail latency in warehouse-scale applications
S Kanev, K Hazelwood, GY Wei, D Brooks
2014 IEEE International Symposium on Workload Characterization (IISWC), 31-40, 2014
532014
Dynamic program analysis of microsoft windows applications
A Skaletsky, T Devor, N Chachmon, R Cohn, K Hazelwood, V Vladimirov, ...
2010 IEEE International Symposium on Performance Analysis of Systems …, 2010
442010
Reducing DRAM footprint with NVM in Facebook
A Eisenman, D Gardner, I AbdelRahman, J Axboe, S Dong, K Hazelwood, ...
Proceedings of the Thirteenth EuroSys Conference, 1-13, 2018
432018
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