A New Delay Model and Geometric Programming-Based Design Automation for Latched Comparators A Purushothaman, CD Parikh Circuits, Systems, and Signal Processing, 2015 | 9 | 2015 |
Geometric programming-based power optimization and design automation for a digitally controlled pulse width modulator P Rajeswari, G Shekar, S Devi, A Purushothaman Circuits, Systems, and Signal Processing 37, 4049-4064, 2018 | 7 | 2018 |
MINLP based power optimization for pipelined ADC A Purushothaman 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 508-511, 2016 | 7 | 2016 |
Implementation of Low power systolic based RLS adaptive Filter using FPGA A Purushothaman, DC Vijaykumar IEEE 2011, 2011 | 5 | 2011 |
Compound optimal docking of multiple spacecrafts with formation reconfiguration JL Nandagopal, A Vivek, A Purushothaman 2018 4th International Conference on Control, Automation and Robotics (ICCAR …, 2018 | 4 | 2018 |
A low power low area capacitor array based Digital to Analog Converter architecture A Purushothaman, CD Parikh Microelectronics Journal 46 (10), 928-934, 2015 | 4 | 2015 |
Comparison of high K/Metal gate based CMOS amplifiers performance with traditional gate stack structure M Swathi, D Anand, A Purushothaman, S Gopalan 2018 4th International Conference on Electrical Energy Systems (ICEES), 8-13, 2018 | 3 | 2018 |
Design of static latch based comparator using power constrained optimization A Purushothaman, CD Parikh 14th International Symposium on VLSI Design and Test(VDAT), 2010., 2010 | 3 | 2010 |
Mitigating Aperture Error in Pipelined ADCs Without a Front-end Sample-and-Hold Amplfier D James, AT Kunnath, A Purushothaman, BD Sahoo 2018 31st International Conference on VLSI Design and 2018 17th …, 2018 | 2 | 2018 |
Analysis of regeneration time constant of dynamic latch using adomian decomposition method A Purushothaman 2016 20th International Symposium on VLSI Design and Test (VDAT), 1-6, 2016 | 2 | 2016 |
Automating the design of Successive Approximation Register Analog to Digital Converters A Purushothaman, CD Parikh 15th International Symposium on VLSI Design and Test(VDAT), 2011., 2011 | 2 | 2011 |
Brain Inspired One Shot Learning Method for HD Computing DR Nair, A Purushothaman VLSI Design and Test: 23rd International Symposium, VDAT 2019, Indore, India …, 2019 | 1 | 2019 |
Assessing the Performance of CMOS Amplifiers Using High-k Dielectric with Metal Gate on High Mobility Substrate D Anand, M Swathi, A Purushothaman, S Gopalan International Conference on Advances in Computing and Data Sciences, 279-289, 2018 | 1 | 2018 |
Design automation of analog to digital converters based on geometric programming A Purushothaman Dhirubhai Ambani Institute of Information and Communication Technology, 2012 | | 2012 |
VLSID 2018 Best Paper Awards X Liu, R Vemuri, D James, AT Kunnath, A Purushothaman, BD Sahoo, ... | | |