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Leomar Soares da Rosa Junior
Leomar Soares da Rosa Junior
Professor de Computação, Universidade Federal de Pelotas
Verified email at inf.ufpel.edu.br
Title
Cited by
Cited by
Year
Graph-based transistor network generation method for supergate design
VN Possani, V Callegaro, AI Reis, RP Ribas, F de Souza Marques, ...
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24 (2), 692-705, 2015
412015
Switch level optimization of digital CMOS gate networks
LS da Rosa, FR Schneider, RP Ribas, AI Reis
2009 10th International Symposium on Quality Electronic Design, 324-329, 2009
332009
Standby power consumption estimation by interacting leakage current mechanisms in nanoscaled CMOS digital circuits
PF Butzen, LS da Rosa Jr, EJD Chiappetta Filho, AI Reis, RP Ribas
Microelectronics Journal 41 (4), 247-255, 2010
312010
Logic synthesis meets machine learning: Trading exactness for generalization
S Rai, WL Neto, Y Miyasaka, X Zhang, M Yu, Q Yi, M Fujita, GB Manske, ...
2021 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2021
292021
Fast disjoint transistor networks from BDDs
LS da Rosa Junior, FS Marques, TMG Cardoso, RP Ribas, ...
Proceedings of the 19th annual symposium on Integrated circuits and systems …, 2006
272006
A comparative study of CMOS gates with minimum transistor stacks
LS da Rosa, AI Reis, RP Ribas, FS Marques, FR Schneider
Proceedings of the 20th annual conference on Integrated circuits and systems …, 2007
212007
SwitchCraft: a framework for transistor network design
V Callegaro, FS Marques, CE Klock, LS da Rosa Jr, RP Ribas, AI Reis
Proceedings of the 23rd symposium on Integrated circuits and system design …, 2010
202010
Optimizing transistor networks using a graph-based technique
VN Possani, RS de Souza, JS Domingues, LV Agostini, FS Marques, ...
Analog Integrated Circuits and Signal Processing 73, 841-850, 2012
162012
A Media Processing Implementation Using Libvlc for the Ginga Middleware
TH Trojahn, JL Gonçalves, JCB Mattos, LSDR Junior, LV Agostini
2010 5th International Conference on Future Information Technology, 1-6, 2010
92010
NSP kernel finder-A methodology to find and to build non-series-parallel transistor arrangements
VN Possani, FS Marques, LS da Rosa Junior, V Callegaro, AI Reis, ...
2012 25th Symposium on Integrated Circuits and Systems Design (SBCCI), 1-6, 2012
62012
Evaluating geometric aspects of non-series-parallel cells
MS Cardoso, LS da Rosa Jr, F de Souza Marques
Proceedings of the 28th Symposium on Integrated Circuits and Systems Design, 1-6, 2015
52015
Exploring independent gates in FinFET-based transistor network generation
VN Possani, AI Reis, RP Ribas, FS Marques, LS da Rosa Junior
Proceedings of the 27th Symposium on Integrated Circuits and Systems Design, 1-6, 2014
52014
Evaluating two implementations of the component responsible for decoding video and audio in the Brazilian digital TV middleware
TH Trojahn, JL Gonçalves, JCB Mattos, LV Agostini, LS Da Rosa
Multimedia Tools and Applications 57, 373-392, 2012
52012
Logicflow: Uma ferramenta para o auxílio de ensino-aprendizagem de circuitos digitais
LQ Jurgina, R Zanandrea, LSR Júnior, F de Souza Marques
Anais do XXXI Simpósio Brasileiro de Informática na Educação, 322-331, 2020
42020
High throughput 4x4 and 8x8 SATD similarity criteria architectures for video coding applications
JS Dominges Jr, VN Possani, DS Silveira, LS da Rosa Jr, LV Agostini
2011 VII Designer Forum (DF), 115, 2011
42011
Fast Boolean factoring with multi-objective goals
AI Reis, A Rasmussen, LR Junior, RP Ribas
International Workshop on Logic & Synthesis-IWLS 2009, 2009
42009
Speed-up of ASICs derived from FPGAs by transistor network synthesis including reordering
TMG Cardoso, F de Souza Marques, RP Ribas, AI Reis, LS da Rosa
9th International Symposium on Quality Electronic Design (isqed 2008), 47-52, 2008
42008
A parallel motion estimation solution for heterogeneous system on chip
M Melo, G Smaniotto, H Maich, L Agostini, B Zatt, L Rosa, M Porto
2016 29th Symposium on Integrated Circuits and Systems Design (SBCCI), 1-6, 2016
32016
Transistor-level optimization of CMOS complex gates
VN Possani, FS Marques, LS da Rosa Junior, V Callegaro, AI Reis, ...
2013 IEEE 4th Latin American Symposium on Circuits and Systems (LASCAS), 1-4, 2013
32013
A comparative analysis of media processing component implementations for the Brazilian digital TV middleware
TH Trojahn, JL Gonçalves, JC Balzano de Mattos, LV Agostini, ...
International Journal of Information Technology, Communications and …, 2011
32011
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