Dmitry Ponomarev
Dmitry Ponomarev
Professor of Computer Science, Binghamton University
Verified email at - Homepage
TitleCited byYear
Reducing power requirements of instruction scheduling through dynamic allocation of multiple datapath resources
D Ponomarev, G Kucuk, K Ghose
Proceedings. 34th ACM/IEEE International Symposium on Microarchitecture …, 2001
Non-monopolizable caches: Low-complexity mitigation of cache side channel attacks
L Domnitser, A Jaleel, J Loew, N Abu-Ghazaleh, D Ponomarev
ACM Transactions on Architecture and Code Optimization (TACO) 8 (4), 1-21, 2012
Jump over ASLR: Attacking branch predictors to bypass ASLR
D Evtyushkin, D Ponomarev, N Abu-Ghazaleh
2016 49th Annual IEEE/ACM International Symposium on Microarchitecture …, 2016
Register packing: Exploiting narrow-width operands for reducing register file pressure
O Ergin, D Balkan, K Ghose, D Ponomarev
37th International Symposium on Microarchitecture (MICRO-37'04), 304-315, 2004
Branch regulation: Low-overhead protection from code reuse attacks
M Kayaalp, M Ozsoy, N Abu-Ghazaleh, D Ponomarev
ACM SIGARCH Computer Architecture News 40 (3), 94-105, 2012
M-sim: a flexible, multithreaded architectural simulation environment
J Sharkey, D Ponomarev, K Ghose
Techenical report, Department of Computer Science, State University of New …, 2005
Malware-aware processors: A framework for efficient online malware detection
M Ozsoy, C Donovick, I Gorelik, N Abu-Ghazaleh, D Ponomarev
2015 IEEE 21st International Symposium on High Performance Computer …, 2015
Branchscope: A new side-channel attack on directional branch predictor
D Evtyushkin, R Riley, NCSEECE Abu-Ghazaleh, D Ponomarev
ACM SIGPLAN Notices 53 (2), 693-707, 2018
Increasing processor performance through early register release
O Ergin, D Balkan, D Ponomarev, K Ghose
IEEE International Conference on Computer Design: VLSI in Computers and …, 2004
Iso-x: A flexible architecture for hardware-managed isolated execution
D Evtyushkin, J Elwell, M Ozsoy, D Ponomarev, NA Ghazaleh, R Riley
2014 47th Annual IEEE/ACM International Symposium on Microarchitecture, 190-202, 2014
M-Sim: A flexible, multi-threaded simulation environment
J Sharkey, D Ponomarev
Tech. Report CS-TR-05-DP1, Department of Computer Science, SUNY Binghamton, 2005
A high-resolution side-channel attack on last-level cache
M Kayaalp, N Abu-Ghazaleh, D Ponomarev, A Jaleel
Proceedings of the 53rd Annual Design Automation Conference, 1-6, 2016
SCRAP: Architecture for signature-based protection from code reuse attacks
M Kayaalp, T Schmitt, J Nomani, D Ponomarev, N Abu-Ghazaleh
2013 IEEE 19th International Symposium on High Performance Computer …, 2013
Optimization of parallel discrete event simulator for multi-core systems
D Jagtap, N Abu-Ghazaleh, D Ponomarev
2012 IEEE 26th International Parallel and Distributed Processing Symposium …, 2012
Energy-efficient issue queue design
DV Ponomarev, G Kucuk, O Ergin, K Ghose, PM Kogge
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 11 (5), 789-800, 2003
AccuPower: An accurate power estimation tool for superscalar microprocessors
D Ponomarev, G Kucuk, K Ghose
Proceedings 2002 Design, Automation and Test in Europe Conference and …, 2002
Energy efficient comparators for superscalar datapaths
DV Ponomarev, G Kucuk, O Ergin, K Ghose
IEEE Transactions on Computers 53 (7), 892-904, 2004
Energy: efficient instruction dispatch buffer design for superscalar processors
G Kucuk, K Ghose, DV Ponomarev, PM Kogge
Proceedings of the 2001 international symposium on Low power electronics and …, 2001
Ensemble learning for low-level hardware-supported malware detection
KN Khasawneh, M Ozsoy, C Donovick, N Abu-Ghazaleh, D Ponomarev
International Symposium on Recent Advances in Intrusion Detection, 3-25, 2015
Parallel discrete event simulation for multi-core systems: Analysis and optimization
J Wang, D Jagtap, N Abu-Ghazaleh, D Ponomarev
IEEE Transactions on Parallel and Distributed Systems 25 (6), 1574-1584, 2013
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