| Low-power CMOS VLSI circuit design K Roy, SC Prasad John Wiley & Sons, 2009 | 985 | 2009 |
| Circuit activity based logic synthesis for low power reliable operations K Roy, SC Prasad IEEE Transactions on Very Large Scale Integration (VLSI) Systems 1 (4), 503-513, 1993 | 222 | 1993 |
| SYCLOP: Synthesis of CMOS logic for low power applications K Roy, S Prasad Proceedings 1992 IEEE International Conference on Computer Design: VLSI in …, 1992 | 169 | 1992 |
| Estimation of Circuit Activity Considering Signal Correlations and simultaneous Switchirlg TL Chou, K Roy, S Prasad | 135 | 1994 |
| Efficient framing procedure for variable length packets S Prasad, M Rusu, H Suzuki, S Venkataraman, S Binetti, L Della Chiesa US Patent 7,570,643, 2009 | 93 | 2009 |
| ATM cell scheduler which uses a heap memory and associates timestamps with each channel JR Quay, BJ Karguth, S Prasad US Patent 6,205,151, 2001 | 93 | 2001 |
| Method and system for providing operations, administration, and maintenance capabilities in packet over optics networks A Bechtolsheim, H Suzuki, M Rusu, P Frantz, S Prasad US Patent 7,043,541, 2006 | 72 | 2006 |
| Network switch and method for data switching using a crossbar switch fabric with output port groups operating concurrently and independently H Suzuki, P Chang, S Prasad, C Fang US Patent 6,813,274, 2004 | 68 | 2004 |
| Scalable multistage interconnection network architecture and method for performing in-service upgrade thereof SC Prasad US Patent 6,049,542, 2000 | 68 | 2000 |
| Memory-efficient leaky bucket policer for traffic management of asynchronous transfer mode data communications S Prasad US Patent 6,381,214, 2002 | 59 | 2002 |
| Circuit optimization for minimisation of power consumption under delay constraint SC Prasad, K Roy Proceedings of the 8th International Conference on VLSI Design, 305-309, 1995 | 57 | 1995 |
| Programmable architecture fast packet switch SC Prasad, AL Yee, PK Fung, RJ Landry US Patent 6,275,491, 2001 | 51 | 2001 |
| Apparatus and method for enabling intelligent Fibre-Channel connectivity over transport S Natarajan, S Prasad, Y Deng, Y Wang US Patent 7,706,294, 2010 | 44 | 2010 |
| Deep Recurrent Neural Networks for Time Series Prediction S Prasad, P Prasad https://arxiv.org/abs/1407.5949, 2014 | 42 | 2014 |
| Apparatus and method for improved Fibre Channel oversubscription over transport S Natarajan, S Prasad US Patent 7,391,728, 2008 | 38 | 2008 |
| Centralized memory based packet switching system and method S Prasad, T Seaver, Y Wang, Y Deng, LM Hernandez US Patent 7,391,786, 2008 | 37 | 2008 |
| Apparatus and method for distance extension of fibre-channel over transport S Natarajan, S Prasad, Y Deng, Y Wang US Patent 7,145,877, 2006 | 33 | 2006 |
| Nested measurement period switch algorithm for flow control of available bit rate ATM communications S Prasad US Patent 6,377,550, 2002 | 32 | 2002 |
| Formation of Coke in the Disproportionation of n-Propylbenzene on Zeolites SB Liu, S Prasad, JF Wu, LJ Ma, TC Yang, JT Chiou, JY Chang, TC Tsai Journal of Catalysis 142 (2), 664-671, 1993 | 32 | 1993 |
| Circuit activity driven multilevel logic optimization for low power reliable operation SC Prasad, K Roy 1993 European Conference on Design Automation with the European Event in …, 1993 | 27 | 1993 |
